util/spd_tools/lp4x: Add new memory part to to global memory definition

This new definition is for MT53E512M32D1NP-046 WT:B used on Cret.

BUG=b:183057749
TEST=Generate SPDs

Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: Ica5df61d96d2c4cbe62a560a53bd3bd08eb121f9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54746
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Dtrain Hsu 2021-05-21 11:42:19 +08:00 committed by Patrick Georgi
parent 83faea00f5
commit c8b22418aa
5 changed files with 119 additions and 0 deletions

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@ -0,0 +1,32 @@
23 11 11 0E 17 29 94 08 00 00 00 00 0A 22 00 00
00 00 04 FF 92 54 05 00 87 00 90 A8 90 E0 0B F0
05 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 E5 00 E0 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20
20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

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@ -0,0 +1,32 @@
23 11 11 0E 16 21 B4 08 00 00 00 00 0A 22 00 00
00 00 04 FF 92 54 05 00 87 00 90 A8 90 C0 08 60
04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

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@ -0,0 +1,32 @@
23 11 11 0E 15 19 04 08 00 00 00 00 02 22 00 00
00 00 04 0A 80 54 05 00 87 00 90 A8 90 A0 05 D0
02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00
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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

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@ -3,6 +3,7 @@ H9HCNNNFAMMLXR-NEE,lp4x-spd-2.hex
K4U6E3S4AA-MGCL,lp4x-spd-1.hex K4U6E3S4AA-MGCL,lp4x-spd-1.hex
K4UBE3D4AA-MGCL,lp4x-spd-3.hex K4UBE3D4AA-MGCL,lp4x-spd-3.hex
MT53E1G32D2NP-046 WT:A,lp4x-spd-4.hex MT53E1G32D2NP-046 WT:A,lp4x-spd-4.hex
MT53E1G32D2NP-046 WT:B,lp4x-spd-5.hex
H9HKNNNCRMBVAR-NEH,lp4x-spd-5.hex H9HKNNNCRMBVAR-NEH,lp4x-spd-5.hex
MT53E1G64D4SQ-046 WT:A,lp4x-spd-6.hex MT53E1G64D4SQ-046 WT:A,lp4x-spd-6.hex
MT53E512M32D2NP-046 WT:F,lp4x-spd-1.hex MT53E512M32D2NP-046 WT:F,lp4x-spd-1.hex
@ -11,3 +12,13 @@ K4U6E3S4AA-MGCR,lp4x-spd-1.hex
MT53E512M32D2NP-046 WT:E,lp4x-spd-1.hex MT53E512M32D2NP-046 WT:E,lp4x-spd-1.hex
H9HCNNNCPMMLXR-NEE,lp4x-spd-3.hex H9HCNNNCPMMLXR-NEE,lp4x-spd-3.hex
K4UBE3D4AA-MGCR,lp4x-spd-3.hex K4UBE3D4AA-MGCR,lp4x-spd-3.hex
MT53E512M64D4NW-046 WT:E,lp4x-spd-5.hex
MT53E1G64D8NW-046 WT:E,lp4x-spd-8.hex
H9HCNNNCRMBLPR-NEE,lp4x-spd-5.hex
H9HCNNNFBMBLPR-NEE,lp4x-spd-8.hex
MT53D1G64D4NW-046 WT:A,lp4x-spd-6.hex
MT53D512M64D4NW-046 WT:F,lp4x-spd-5.hex
NT6AP256T32AV-J1,lp4x-spd-9.hex
MT53E1G32D4NQ-046 WT:E,lp4x-spd-3.hex
MT53E2G32D4NQ-046 WT:A,lp4x-spd-10.hex
MT53E512M32D1NP-046 WT:B,lp4x-spd-1.hex

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@ -279,6 +279,18 @@
"ranksPerChannel": 2, "ranksPerChannel": 2,
"speedMbps": 4267 "speedMbps": 4267
} }
},
{
"name": "MT53E512M32D1NP-046 WT:B",
"attribs": {
"densityPerChannelGb": 8,
"banks": 8,
"channelsPerDie": 2,
"diesPerPackage": 1,
"bitWidthPerChannel": 16,
"ranksPerChannel": 1,
"speedMbps": 4267
}
} }
] ]
} }