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arch/x86: Drop leftover ROMCC console support 

Change-Id: I3e52569a34e1f7bfea8be9da91348c364ab705e1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26817
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki 2018-06-04 06:02:01 +03:00 committed by Martin Roth
parent 5ad79cdf2f
commit c8cf591ee8
6 changed files with 15 additions and 386 deletions
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83
src/arch/x86/romcc_console.c
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@ -1,83 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2003 Eric Biederman
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <build.h>
#include <console/streams.h>
#include <console/early_print.h>
#include <commonlib/loglevel.h>
/* Include the sources. */
#if IS_ENABLED(CONFIG_CONSOLE_SERIAL) && IS_ENABLED(CONFIG_DRIVERS_UART_8250IO)
#include "drivers/uart/util.c"
#include "drivers/uart/uart8250io.c"
#endif
#if IS_ENABLED(CONFIG_CONSOLE_NE2K)
#include "drivers/net/ne2k.c"
#endif
void console_hw_init(void)
{
#if IS_ENABLED(CONFIG_CONSOLE_SERIAL)
uart_init(CONFIG_UART_FOR_CONSOLE);
#endif
#if IS_ENABLED(CONFIG_CONSOLE_NE2K)
ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT);
#endif
}
void console_tx_byte(unsigned char byte)
{
#if IS_ENABLED(CONFIG_CONSOLE_SERIAL)
uart_tx_byte(CONFIG_UART_FOR_CONSOLE, byte);
#endif
#if IS_ENABLED(CONFIG_CONSOLE_NE2K)
ne2k_append_data_byte(byte, CONFIG_CONSOLE_NE2K_IO_PORT);
#endif
}
void console_tx_flush(void)
{
#if IS_ENABLED(CONFIG_CONSOLE_SERIAL)
uart_tx_flush(CONFIG_UART_FOR_CONSOLE);
#endif
#if IS_ENABLED(CONFIG_CONSOLE_NE2K)
ne2k_transmit(CONFIG_CONSOLE_NE2K_IO_PORT);
#endif
}
#include <console/early_print.c>
#include <console/post.c>
#include <console/die.c>
void console_init(void)
{
static const char console_test[] =
"\n\ncoreboot-"
COREBOOT_VERSION
COREBOOT_EXTRA_VERSION
" "
COREBOOT_BUILD
" romstage starting...\n";
console_hw_init();
print_info(console_test);
}
void die(const char *msg)
{
print_emerg(msg);
halt();
}

60
src/console/early_print.c
View File

@ -1,60 +0,0 @@
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/streams.h>
void console_tx_nibble(unsigned nibble)
{
unsigned char digit;
digit = nibble + '0';
if (digit > '9') {
digit += 39;
}
console_tx_byte(digit);
}
void console_tx_hex8(unsigned char value)
{
console_tx_nibble((value >> 4U) & 0x0fU);
console_tx_nibble(value & 0x0fU);
}
void console_tx_hex16(unsigned short value)
{
console_tx_nibble((value >> 12U) & 0x0fU);
console_tx_nibble((value >> 8U) & 0x0fU);
console_tx_nibble((value >> 4U) & 0x0fU);
console_tx_nibble(value & 0x0fU);
}
void console_tx_hex32(unsigned int value)
{
console_tx_nibble((value >> 28U) & 0x0fU);
console_tx_nibble((value >> 24U) & 0x0fU);
console_tx_nibble((value >> 20U) & 0x0fU);
console_tx_nibble((value >> 16U) & 0x0fU);
console_tx_nibble((value >> 12U) & 0x0fU);
console_tx_nibble((value >> 8U) & 0x0fU);
console_tx_nibble((value >> 4U) & 0x0fU);
console_tx_nibble(value & 0x0fU);
}
void console_tx_string(const char *str)
{
unsigned char ch;
while ((ch = *str++) != '\0') {
if (ch == '\n')
console_tx_byte('\r');
console_tx_byte(ch);
}
}

147
src/drivers/net/ne2k.c
View File

@ -35,6 +35,7 @@ SMC8416 PIO support added by Andrew Bettison (andrewb@zip.com.au) on 4/3/02
#include <device/pci.h> #include <device/pci.h>
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include <rules.h>
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
#include <ip_checksum.h> #include <ip_checksum.h>
@ -107,73 +108,7 @@ void ne2k_append_data(unsigned char *d, int len, unsigned int base)
set_count(base, get_count(base)+len); set_count(base, get_count(base)+len);
} }
#ifdef __ROMCC__
void eth_pio_write_byte(int data, unsigned short dst, unsigned int eth_nic_base)
{
outb(D8390_COMMAND_RD2 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND);
outb(D8390_ISR_RDC, eth_nic_base + D8390_P0_ISR);
outb(1, eth_nic_base + D8390_P0_RBCR0);
outb(0, eth_nic_base + D8390_P0_RBCR1);
outb(dst, eth_nic_base + D8390_P0_RSAR0);
outb(dst >> 8, eth_nic_base + D8390_P0_RSAR1);
outb(D8390_COMMAND_RD1 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND);
outb(data, eth_nic_base + NE_ASIC_OFFSET + NE_DATA);
while ((inb(eth_nic_base + D8390_P0_ISR) & D8390_ISR_RDC) != D8390_ISR_RDC)
;
}
void ne2k_append_data_byte(int d, unsigned int base)
{
eth_pio_write_byte(d, (TX_START << 8) + 42 + get_count(base), base);
set_count(base, get_count(base)+1);
}
static unsigned char eth_pio_read_byte(unsigned int src,
unsigned int eth_nic_base)
{
outb(D8390_COMMAND_RD2 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND);
outb(0, eth_nic_base + D8390_P0_RBCR0);
outb(1, eth_nic_base + D8390_P0_RBCR1);
outb(src, eth_nic_base + D8390_P0_RSAR0);
outb(src >> 8, eth_nic_base + D8390_P0_RSAR1);
outb(D8390_COMMAND_RD0 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND);
return inb(eth_nic_base + NE_ASIC_OFFSET + NE_DATA);
}
/* Variation of compute_ip_checksum which works on SRAM */
unsigned long compute_ip_checksum_from_sram(unsigned short offset, unsigned short length,
unsigned int eth_nic_base)
{
unsigned long sum;
unsigned long i;
/* In the most straight forward way possible,
* compute an ip style checksum.
*/
sum = 0;
for (i = 0; i < length; i++) {
unsigned long v;
v = eth_pio_read_byte((TX_START << 8)+i+offset, eth_nic_base);
if (i & 1) {
v <<= 8;
}
/* Add the new value */
sum += v;
/* Wrap around the carry */
if (sum > 0xFFFF) {
sum = (sum + (sum >> 16)) & 0xFFFF;
}
}
return (~((sum & 0xff) | (((sum >> 8) & 0xff) << 8) )) & 0xffff;
}
static void str2ip_load(const char *str, unsigned short offset, unsigned int eth_nic_base)
#else
static void str2ip(const char *str, unsigned char *ip) static void str2ip(const char *str, unsigned char *ip)
#endif
{ {
unsigned char c, i = 0; unsigned char c, i = 0;
int acc = 0; int acc = 0;
@ -184,23 +119,14 @@ static void str2ip(const char *str, unsigned char *ip)
acc *= 10; acc *= 10;
acc += (c - '0'); acc += (c - '0');
} else { } else {
#ifdef __ROMCC__
eth_pio_write_byte(acc, (TX_START << 8)+offset, eth_nic_base);
offset++;
#else
*ip++ = acc; *ip++ = acc;
#endif
acc = 0; acc = 0;
} }
i++; i++;
} while (c != '\0'); } while (c != '\0');
} }
#ifdef __ROMCC__
static void str2mac_load(const char *str, unsigned short offset, unsigned int eth_nic_base)
#else
static void str2mac(const char *str, unsigned char *mac) static void str2mac(const char *str, unsigned char *mac)
#endif
{ {
unsigned char c, i = 0; unsigned char c, i = 0;
int acc = 0; int acc = 0;
@ -218,12 +144,7 @@ static void str2mac(const char *str, unsigned char *mac)
acc *= 16; acc *= 16;
acc += ((c - 'A') + 10) ; acc += ((c - 'A') + 10) ;
} else { } else {
#ifdef __ROMCC__
eth_pio_write_byte(acc, ((TX_START << 8)+offset), eth_nic_base);
offset++;
#else
*mac++ = acc; *mac++ = acc;
#endif
acc = 0; acc = 0;
} }
@ -232,39 +153,31 @@ static void str2mac(const char *str, unsigned char *mac)
} }
#ifndef __ROMCC__ static void ns8390_tx_header(unsigned int eth_nic_base, int pktlen)
static void ns8390_tx_header(unsigned int eth_nic_base, int pktlen) { {
unsigned short chksum; unsigned short chksum;
unsigned char hdr[] = { unsigned char hdr[] = {
#else /* ETHERNET HDR */
static const unsigned char hdr[] = { /* destination macaddr */
#endif
/*
* ETHERNET HDR
*/
// destination macaddr
0x02, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x01,
/* source mac */ /* source mac */
0x02, 0x00, 0x00, 0xC0, 0xFF, 0xEE, 0x02, 0x00, 0x00, 0xC0, 0xFF, 0xEE,
/* ethtype (IP) */ /* ethtype (IP) */
0x08, 0x00, 0x08, 0x00,
/*
* IP HDR /* IP HDR */
*/
0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00,
/* TTL, proto (UDP), chksum_hi, chksum_lo, IP0, IP1, IP2, IP3, */ /* TTL, proto (UDP), chksum_hi, chksum_lo, IP0, IP1, IP2, IP3, */
0x40, 0x11, 0x0, 0x0, 0x7f, 0x0, 0x0, 0x1, 0x40, 0x11, 0x0, 0x0, 0x7f, 0x0, 0x0, 0x1,
/* IP0, IP1, IP2, IP3 */ /* IP0, IP1, IP2, IP3 */
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
/*
* UDP HDR /* UDP HDR */
*/ /* SRC PORT DST PORT (2 bytes each),
/* SRC PORT DST PORT (2bytes each), ulen, uchksum (must be zero or correct */ * ulen, uchksum (must be zero or correct */
0x1a, 0x0b, 0x1a, 0x0a, 0x00, 0x9, 0x00, 0x00, 0x1a, 0x0b, 0x1a, 0x0a, 0x00, 0x9, 0x00, 0x00,
}; };
#ifndef __ROMCC__
str2mac(CONFIG_CONSOLE_NE2K_DST_MAC, &hdr[0]); str2mac(CONFIG_CONSOLE_NE2K_DST_MAC, &hdr[0]);
str2ip(CONFIG_CONSOLE_NE2K_DST_IP, &hdr[30]); str2ip(CONFIG_CONSOLE_NE2K_DST_IP, &hdr[30]);
str2ip(CONFIG_CONSOLE_NE2K_SRC_IP, &hdr[26]); str2ip(CONFIG_CONSOLE_NE2K_SRC_IP, &hdr[26]);
@ -288,40 +201,6 @@ static const unsigned char hdr[] = {
eth_pio_write(hdr, (TX_START << 8), sizeof(hdr), eth_nic_base); eth_pio_write(hdr, (TX_START << 8), sizeof(hdr), eth_nic_base);
} }
#else
/* ROMCC madness */
static void ns8390_tx_header(unsigned int eth_nic_base, int pktlen)
{
unsigned short chksum;
eth_pio_write(hdr, (TX_START << 8), sizeof(hdr), eth_nic_base);
str2mac_load(CONFIG_CONSOLE_NE2K_DST_MAC, 0, eth_nic_base);
str2ip_load(CONFIG_CONSOLE_NE2K_DST_IP, 30, eth_nic_base);
str2ip_load(CONFIG_CONSOLE_NE2K_SRC_IP, 26, eth_nic_base);
/* zero checksum */
eth_pio_write_byte(0, (TX_START << 8)+24, eth_nic_base);
eth_pio_write_byte(0, (TX_START << 8)+25, eth_nic_base);
/* update IP packet len */
eth_pio_write_byte(((28 + pktlen) >> 8) & 0xff, (TX_START << 8)+16, eth_nic_base);
eth_pio_write_byte( (28 + pktlen) & 0xff, (TX_START << 8)+17, eth_nic_base);
/* update UDP len */
eth_pio_write_byte((8 + pktlen) >> 8, (TX_START << 8)+38, eth_nic_base);
eth_pio_write_byte( 8 + pktlen, (TX_START << 8)+39, eth_nic_base);
chksum = compute_ip_checksum_from_sram(14, 20, eth_nic_base);
eth_pio_write_byte(chksum, (TX_START << 8)+24, eth_nic_base);
eth_pio_write_byte(chksum >> 8, (TX_START << 8)+25, eth_nic_base);
}
#endif
void ne2k_transmit(unsigned int eth_nic_base) { void ne2k_transmit(unsigned int eth_nic_base) {
unsigned int pktsize; unsigned int pktsize;
unsigned int len = get_count(eth_nic_base); unsigned int len = get_count(eth_nic_base);
@ -351,7 +230,7 @@ void ne2k_transmit(unsigned int eth_nic_base) {
set_count(eth_nic_base, 0); set_count(eth_nic_base, 0);
} }
#ifdef __PRE_RAM__ #if !ENV_RAMSTAGE
static void ns8390_reset(unsigned int eth_nic_base) static void ns8390_reset(unsigned int eth_nic_base)
{ {
@ -455,4 +334,4 @@ static const struct pci_driver ne2k_driver __pci_driver = {
.device = 0x8029, .device = 0x8029,
}; };
#endif /* __PRE_RAM__ */ #endif /* !ENV_RAMSTAGE */

5
src/drivers/uart/uart8250io.c
View File

@ -17,14 +17,11 @@
#include <rules.h> #include <rules.h>
#include <stdlib.h> #include <stdlib.h>
#include <arch/io.h> #include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <console/uart.h> #include <console/uart.h>
#include <trace.h> #include <trace.h>
#include "uart8250reg.h" #include "uart8250reg.h"
#ifndef __ROMCC__
#include <boot/coreboot_tables.h>
#endif
/* Should support 8250, 16450, 16550, 16550A type UARTs */ /* Should support 8250, 16450, 16550, 16550A type UARTs */
/* Expected character delay at 1200bps is 9ms for a working UART /* Expected character delay at 1200bps is 9ms for a working UART

100
src/include/console/early_print.h
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@ -1,100 +0,0 @@
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __CONSOLE_EARLY_PRINT_H_
#define __CONSOLE_EARLY_PRINT_H_
#if !defined(__ROMCC__)
#error "Don't include early_print.h"
#endif
#include <console/console.h>
#include <console/streams.h>
#include <commonlib/loglevel.h>
/* While in romstage, console loglevel is built-time constant.
* With ROMCC we inline this test with help from preprocessor.
*/
#define console_log_level(msg_level) \
(msg_level <= CONFIG_DEFAULT_CONSOLE_LOGLEVEL)
#define CALL_CONSOLE_TX(loglevel, tx_func, x) \
do { \
if (console_log_level(loglevel)) { \
tx_func(x); \
console_tx_flush(); \
} \
} while (0)
#define __console_tx_char(level, x) \
CALL_CONSOLE_TX(level, console_tx_byte, x)
#define __console_tx_hex8(level, x) \
CALL_CONSOLE_TX(level, console_tx_hex8, x)
#define __console_tx_hex16(level, x) \
CALL_CONSOLE_TX(level, console_tx_hex16, x)
#define __console_tx_hex32(level, x) \
CALL_CONSOLE_TX(level, console_tx_hex32, x)
#define __console_tx_string(level, x) \
CALL_CONSOLE_TX(level, console_tx_string, x)
#define print_emerg(STR) __console_tx_string(BIOS_EMERG, STR)
#define print_alert(STR) __console_tx_string(BIOS_ALERT, STR)
#define print_crit(STR) __console_tx_string(BIOS_CRIT, STR)
#define print_err(STR) __console_tx_string(BIOS_ERR, STR)
#define print_warning(STR) __console_tx_string(BIOS_WARNING, STR)
#define print_notice(STR) __console_tx_string(BIOS_NOTICE, STR)
#define print_info(STR) __console_tx_string(BIOS_INFO, STR)
#define print_debug(STR) __console_tx_string(BIOS_DEBUG, STR)
#define print_spew(STR) __console_tx_string(BIOS_SPEW, STR)
#define print_emerg_char(CH) __console_tx_char(BIOS_EMERG, CH)
#define print_alert_char(CH) __console_tx_char(BIOS_ALERT, CH)
#define print_crit_char(CH) __console_tx_char(BIOS_CRIT, CH)
#define print_err_char(CH) __console_tx_char(BIOS_ERR, CH)
#define print_warning_char(CH) __console_tx_char(BIOS_WARNING, CH)
#define print_notice_char(CH) __console_tx_char(BIOS_NOTICE, CH)
#define print_info_char(CH) __console_tx_char(BIOS_INFO, CH)
#define print_debug_char(CH) __console_tx_char(BIOS_DEBUG, CH)
#define print_spew_char(CH) __console_tx_char(BIOS_SPEW, CH)
#define print_emerg_hex8(HEX) __console_tx_hex8(BIOS_EMERG, HEX)
#define print_alert_hex8(HEX) __console_tx_hex8(BIOS_ALERT, HEX)
#define print_crit_hex8(HEX) __console_tx_hex8(BIOS_CRIT, HEX)
#define print_err_hex8(HEX) __console_tx_hex8(BIOS_ERR, HEX)
#define print_warning_hex8(HEX) __console_tx_hex8(BIOS_WARNING, HEX)
#define print_notice_hex8(HEX) __console_tx_hex8(BIOS_NOTICE, HEX)
#define print_info_hex8(HEX) __console_tx_hex8(BIOS_INFO, HEX)
#define print_debug_hex8(HEX) __console_tx_hex8(BIOS_DEBUG, HEX)
#define print_spew_hex8(HEX) __console_tx_hex8(BIOS_SPEW, HEX)
#define print_emerg_hex16(HEX) __console_tx_hex16(BIOS_EMERG, HEX)
#define print_alert_hex16(HEX) __console_tx_hex16(BIOS_ALERT, HEX)
#define print_crit_hex16(HEX) __console_tx_hex16(BIOS_CRIT, HEX)
#define print_err_hex16(HEX) __console_tx_hex16(BIOS_ERR, HEX)
#define print_warning_hex16(HEX) __console_tx_hex16(BIOS_WARNING, HEX)
#define print_notice_hex16(HEX) __console_tx_hex16(BIOS_NOTICE, HEX)
#define print_info_hex16(HEX) __console_tx_hex16(BIOS_INFO, HEX)
#define print_debug_hex16(HEX) __console_tx_hex16(BIOS_DEBUG, HEX)
#define print_spew_hex16(HEX) __console_tx_hex16(BIOS_SPEW, HEX)
#define print_emerg_hex32(HEX) __console_tx_hex32(BIOS_EMERG, HEX)
#define print_alert_hex32(HEX) __console_tx_hex32(BIOS_ALERT, HEX)
#define print_crit_hex32(HEX) __console_tx_hex32(BIOS_CRIT, HEX)
#define print_err_hex32(HEX) __console_tx_hex32(BIOS_ERR, HEX)
#define print_warning_hex32(HEX) __console_tx_hex32(BIOS_WARNING, HEX)
#define print_notice_hex32(HEX) __console_tx_hex32(BIOS_NOTICE, HEX)
#define print_info_hex32(HEX) __console_tx_hex32(BIOS_INFO, HEX)
#define print_debug_hex32(HEX) __console_tx_hex32(BIOS_DEBUG, HEX)
#define print_spew_hex32(HEX) __console_tx_hex32(BIOS_SPEW, HEX)
#endif /* __CONSOLE_EARLY_PRINT_H_ */

6
src/include/console/ne2k.h
View File

@ -23,10 +23,6 @@ void ne2k_append_data(unsigned char *d, int len, unsigned int base);
int ne2k_init(unsigned int eth_nic_base); int ne2k_init(unsigned int eth_nic_base);
void ne2k_transmit(unsigned int eth_nic_base); void ne2k_transmit(unsigned int eth_nic_base);
#ifndef __ROMCC__
#define ne2k_append_data_byte(d, base) ne2k_append_data(&d, 1, base)
#endif
#if IS_ENABLED(CONFIG_CONSOLE_NE2K) && (ENV_ROMSTAGE || ENV_RAMSTAGE) #if IS_ENABLED(CONFIG_CONSOLE_NE2K) && (ENV_ROMSTAGE || ENV_RAMSTAGE)
static inline void __ne2k_init(void) static inline void __ne2k_init(void)
{ {
@ -34,7 +30,7 @@ static inline void __ne2k_init(void)
} }
static inline void __ne2k_tx_byte(u8 data) static inline void __ne2k_tx_byte(u8 data)
{ {
ne2k_append_data_byte(data, CONFIG_CONSOLE_NE2K_IO_PORT); ne2k_append_data(&data, 1, CONFIG_CONSOLE_NE2K_IO_PORT);
} }
static inline void __ne2k_tx_flush(void) static inline void __ne2k_tx_flush(void)
{ {