arch/x86: Drop leftover ROMCC console support
Change-Id: I3e52569a34e1f7bfea8be9da91348c364ab705e1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26817 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki
Martin Roth
parent
5ad79cdf2f
commit
c8cf591ee8
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@ -1,83 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2003 Eric Biederman
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <build.h>
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#include <console/streams.h>
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#include <console/early_print.h>
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#include <commonlib/loglevel.h>
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/* Include the sources. */
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#if IS_ENABLED(CONFIG_CONSOLE_SERIAL) && IS_ENABLED(CONFIG_DRIVERS_UART_8250IO)
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#include "drivers/uart/util.c"
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#include "drivers/uart/uart8250io.c"
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#endif
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#if IS_ENABLED(CONFIG_CONSOLE_NE2K)
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#include "drivers/net/ne2k.c"
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#endif
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void console_hw_init(void)
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{
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#if IS_ENABLED(CONFIG_CONSOLE_SERIAL)
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uart_init(CONFIG_UART_FOR_CONSOLE);
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#endif
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#if IS_ENABLED(CONFIG_CONSOLE_NE2K)
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ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT);
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#endif
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}
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void console_tx_byte(unsigned char byte)
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{
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#if IS_ENABLED(CONFIG_CONSOLE_SERIAL)
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uart_tx_byte(CONFIG_UART_FOR_CONSOLE, byte);
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#endif
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#if IS_ENABLED(CONFIG_CONSOLE_NE2K)
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ne2k_append_data_byte(byte, CONFIG_CONSOLE_NE2K_IO_PORT);
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#endif
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}
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void console_tx_flush(void)
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{
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#if IS_ENABLED(CONFIG_CONSOLE_SERIAL)
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uart_tx_flush(CONFIG_UART_FOR_CONSOLE);
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#endif
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#if IS_ENABLED(CONFIG_CONSOLE_NE2K)
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ne2k_transmit(CONFIG_CONSOLE_NE2K_IO_PORT);
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#endif
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}
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#include <console/early_print.c>
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#include <console/post.c>
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#include <console/die.c>
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void console_init(void)
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{
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static const char console_test[] =
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"\n\ncoreboot-"
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COREBOOT_VERSION
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COREBOOT_EXTRA_VERSION
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" "
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COREBOOT_BUILD
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" romstage starting...\n";
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console_hw_init();
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print_info(console_test);
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}
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void die(const char *msg)
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{
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print_emerg(msg);
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halt();
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}
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@ -1,60 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/streams.h>
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void console_tx_nibble(unsigned nibble)
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{
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unsigned char digit;
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digit = nibble + '0';
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if (digit > '9') {
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digit += 39;
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}
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console_tx_byte(digit);
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}
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void console_tx_hex8(unsigned char value)
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{
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console_tx_nibble((value >> 4U) & 0x0fU);
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console_tx_nibble(value & 0x0fU);
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}
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void console_tx_hex16(unsigned short value)
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{
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console_tx_nibble((value >> 12U) & 0x0fU);
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console_tx_nibble((value >> 8U) & 0x0fU);
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console_tx_nibble((value >> 4U) & 0x0fU);
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console_tx_nibble(value & 0x0fU);
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}
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void console_tx_hex32(unsigned int value)
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{
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console_tx_nibble((value >> 28U) & 0x0fU);
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console_tx_nibble((value >> 24U) & 0x0fU);
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console_tx_nibble((value >> 20U) & 0x0fU);
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console_tx_nibble((value >> 16U) & 0x0fU);
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console_tx_nibble((value >> 12U) & 0x0fU);
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console_tx_nibble((value >> 8U) & 0x0fU);
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console_tx_nibble((value >> 4U) & 0x0fU);
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console_tx_nibble(value & 0x0fU);
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}
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void console_tx_string(const char *str)
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{
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unsigned char ch;
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while ((ch = *str++) != '\0') {
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if (ch == '\n')
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console_tx_byte('\r');
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console_tx_byte(ch);
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}
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}
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@ -35,6 +35,7 @@ SMC8416 PIO support added by Andrew Bettison (andrewb@zip.com.au) on 4/3/02
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <rules.h>
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#include <stdlib.h>
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#include <string.h>
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#include <ip_checksum.h>
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@ -107,73 +108,7 @@ void ne2k_append_data(unsigned char *d, int len, unsigned int base)
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set_count(base, get_count(base)+len);
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}
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#ifdef __ROMCC__
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void eth_pio_write_byte(int data, unsigned short dst, unsigned int eth_nic_base)
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{
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outb(D8390_COMMAND_RD2 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND);
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outb(D8390_ISR_RDC, eth_nic_base + D8390_P0_ISR);
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outb(1, eth_nic_base + D8390_P0_RBCR0);
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outb(0, eth_nic_base + D8390_P0_RBCR1);
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outb(dst, eth_nic_base + D8390_P0_RSAR0);
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outb(dst >> 8, eth_nic_base + D8390_P0_RSAR1);
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outb(D8390_COMMAND_RD1 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND);
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outb(data, eth_nic_base + NE_ASIC_OFFSET + NE_DATA);
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while ((inb(eth_nic_base + D8390_P0_ISR) & D8390_ISR_RDC) != D8390_ISR_RDC)
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;
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}
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void ne2k_append_data_byte(int d, unsigned int base)
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{
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eth_pio_write_byte(d, (TX_START << 8) + 42 + get_count(base), base);
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set_count(base, get_count(base)+1);
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}
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static unsigned char eth_pio_read_byte(unsigned int src,
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unsigned int eth_nic_base)
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{
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outb(D8390_COMMAND_RD2 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND);
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outb(0, eth_nic_base + D8390_P0_RBCR0);
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outb(1, eth_nic_base + D8390_P0_RBCR1);
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outb(src, eth_nic_base + D8390_P0_RSAR0);
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outb(src >> 8, eth_nic_base + D8390_P0_RSAR1);
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outb(D8390_COMMAND_RD0 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND);
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return inb(eth_nic_base + NE_ASIC_OFFSET + NE_DATA);
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}
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/* Variation of compute_ip_checksum which works on SRAM */
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unsigned long compute_ip_checksum_from_sram(unsigned short offset, unsigned short length,
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unsigned int eth_nic_base)
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{
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unsigned long sum;
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unsigned long i;
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/* In the most straight forward way possible,
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* compute an ip style checksum.
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*/
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sum = 0;
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for (i = 0; i < length; i++) {
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unsigned long v;
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v = eth_pio_read_byte((TX_START << 8)+i+offset, eth_nic_base);
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if (i & 1) {
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v <<= 8;
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}
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/* Add the new value */
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sum += v;
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/* Wrap around the carry */
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if (sum > 0xFFFF) {
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sum = (sum + (sum >> 16)) & 0xFFFF;
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}
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}
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return (~((sum & 0xff) | (((sum >> 8) & 0xff) << 8) )) & 0xffff;
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}
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static void str2ip_load(const char *str, unsigned short offset, unsigned int eth_nic_base)
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#else
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static void str2ip(const char *str, unsigned char *ip)
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#endif
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{
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unsigned char c, i = 0;
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int acc = 0;
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@ -184,23 +119,14 @@ static void str2ip(const char *str, unsigned char *ip)
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acc *= 10;
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acc += (c - '0');
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} else {
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#ifdef __ROMCC__
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eth_pio_write_byte(acc, (TX_START << 8)+offset, eth_nic_base);
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offset++;
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#else
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*ip++ = acc;
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#endif
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acc = 0;
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}
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i++;
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} while (c != '\0');
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}
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#ifdef __ROMCC__
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static void str2mac_load(const char *str, unsigned short offset, unsigned int eth_nic_base)
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#else
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static void str2mac(const char *str, unsigned char *mac)
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#endif
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{
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unsigned char c, i = 0;
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int acc = 0;
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@ -218,12 +144,7 @@ static void str2mac(const char *str, unsigned char *mac)
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acc *= 16;
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acc += ((c - 'A') + 10) ;
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} else {
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#ifdef __ROMCC__
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eth_pio_write_byte(acc, ((TX_START << 8)+offset), eth_nic_base);
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offset++;
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#else
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*mac++ = acc;
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#endif
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acc = 0;
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}
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@ -232,39 +153,31 @@ static void str2mac(const char *str, unsigned char *mac)
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}
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#ifndef __ROMCC__
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static void ns8390_tx_header(unsigned int eth_nic_base, int pktlen) {
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static void ns8390_tx_header(unsigned int eth_nic_base, int pktlen)
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{
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unsigned short chksum;
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unsigned char hdr[] = {
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#else
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static const unsigned char hdr[] = {
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#endif
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/*
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* ETHERNET HDR
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*/
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// destination macaddr
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/* ETHERNET HDR */
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/* destination macaddr */
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0x02, 0x00, 0x00, 0x00, 0x00, 0x01,
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/* source mac */
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0x02, 0x00, 0x00, 0xC0, 0xFF, 0xEE,
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/* ethtype (IP) */
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0x08, 0x00,
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/*
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* IP HDR
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*/
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/* IP HDR */
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0x45, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00,
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/* TTL, proto (UDP), chksum_hi, chksum_lo, IP0, IP1, IP2, IP3, */
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0x40, 0x11, 0x0, 0x0, 0x7f, 0x0, 0x0, 0x1,
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/* IP0, IP1, IP2, IP3 */
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0xff, 0xff, 0xff, 0xff,
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/*
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* UDP HDR
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*/
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/* SRC PORT DST PORT (2bytes each), ulen, uchksum (must be zero or correct */
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/* UDP HDR */
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/* SRC PORT DST PORT (2 bytes each),
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* ulen, uchksum (must be zero or correct */
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0x1a, 0x0b, 0x1a, 0x0a, 0x00, 0x9, 0x00, 0x00,
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};
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#ifndef __ROMCC__
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str2mac(CONFIG_CONSOLE_NE2K_DST_MAC, &hdr[0]);
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str2ip(CONFIG_CONSOLE_NE2K_DST_IP, &hdr[30]);
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str2ip(CONFIG_CONSOLE_NE2K_SRC_IP, &hdr[26]);
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@ -288,40 +201,6 @@ static const unsigned char hdr[] = {
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eth_pio_write(hdr, (TX_START << 8), sizeof(hdr), eth_nic_base);
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}
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#else
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/* ROMCC madness */
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static void ns8390_tx_header(unsigned int eth_nic_base, int pktlen)
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{
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unsigned short chksum;
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eth_pio_write(hdr, (TX_START << 8), sizeof(hdr), eth_nic_base);
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str2mac_load(CONFIG_CONSOLE_NE2K_DST_MAC, 0, eth_nic_base);
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str2ip_load(CONFIG_CONSOLE_NE2K_DST_IP, 30, eth_nic_base);
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str2ip_load(CONFIG_CONSOLE_NE2K_SRC_IP, 26, eth_nic_base);
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/* zero checksum */
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eth_pio_write_byte(0, (TX_START << 8)+24, eth_nic_base);
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eth_pio_write_byte(0, (TX_START << 8)+25, eth_nic_base);
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/* update IP packet len */
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eth_pio_write_byte(((28 + pktlen) >> 8) & 0xff, (TX_START << 8)+16, eth_nic_base);
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eth_pio_write_byte( (28 + pktlen) & 0xff, (TX_START << 8)+17, eth_nic_base);
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/* update UDP len */
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eth_pio_write_byte((8 + pktlen) >> 8, (TX_START << 8)+38, eth_nic_base);
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eth_pio_write_byte( 8 + pktlen, (TX_START << 8)+39, eth_nic_base);
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chksum = compute_ip_checksum_from_sram(14, 20, eth_nic_base);
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eth_pio_write_byte(chksum, (TX_START << 8)+24, eth_nic_base);
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eth_pio_write_byte(chksum >> 8, (TX_START << 8)+25, eth_nic_base);
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}
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#endif
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void ne2k_transmit(unsigned int eth_nic_base) {
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unsigned int pktsize;
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unsigned int len = get_count(eth_nic_base);
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@ -351,7 +230,7 @@ void ne2k_transmit(unsigned int eth_nic_base) {
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set_count(eth_nic_base, 0);
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}
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#ifdef __PRE_RAM__
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#if !ENV_RAMSTAGE
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static void ns8390_reset(unsigned int eth_nic_base)
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{
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@ -455,4 +334,4 @@ static const struct pci_driver ne2k_driver __pci_driver = {
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.device = 0x8029,
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};
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#endif /* __PRE_RAM__ */
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#endif /* !ENV_RAMSTAGE */
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|
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@ -17,14 +17,11 @@
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#include <rules.h>
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#include <stdlib.h>
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#include <arch/io.h>
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#include <boot/coreboot_tables.h>
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#include <console/uart.h>
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#include <trace.h>
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#include "uart8250reg.h"
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#ifndef __ROMCC__
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#include <boot/coreboot_tables.h>
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#endif
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/* Should support 8250, 16450, 16550, 16550A type UARTs */
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/* Expected character delay at 1200bps is 9ms for a working UART
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|
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@ -1,100 +0,0 @@
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/*
|
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* This file is part of the coreboot project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __CONSOLE_EARLY_PRINT_H_
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#define __CONSOLE_EARLY_PRINT_H_
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|
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#if !defined(__ROMCC__)
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||||
#error "Don't include early_print.h"
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#endif
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#include <console/console.h>
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#include <console/streams.h>
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#include <commonlib/loglevel.h>
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|
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/* While in romstage, console loglevel is built-time constant.
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* With ROMCC we inline this test with help from preprocessor.
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*/
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#define console_log_level(msg_level) \
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(msg_level <= CONFIG_DEFAULT_CONSOLE_LOGLEVEL)
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||||
|
||||
#define CALL_CONSOLE_TX(loglevel, tx_func, x) \
|
||||
do { \
|
||||
if (console_log_level(loglevel)) { \
|
||||
tx_func(x); \
|
||||
console_tx_flush(); \
|
||||
} \
|
||||
} while (0)
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||||
#define __console_tx_char(level, x) \
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CALL_CONSOLE_TX(level, console_tx_byte, x)
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#define __console_tx_hex8(level, x) \
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CALL_CONSOLE_TX(level, console_tx_hex8, x)
|
||||
#define __console_tx_hex16(level, x) \
|
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CALL_CONSOLE_TX(level, console_tx_hex16, x)
|
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#define __console_tx_hex32(level, x) \
|
||||
CALL_CONSOLE_TX(level, console_tx_hex32, x)
|
||||
#define __console_tx_string(level, x) \
|
||||
CALL_CONSOLE_TX(level, console_tx_string, x)
|
||||
|
||||
#define print_emerg(STR) __console_tx_string(BIOS_EMERG, STR)
|
||||
#define print_alert(STR) __console_tx_string(BIOS_ALERT, STR)
|
||||
#define print_crit(STR) __console_tx_string(BIOS_CRIT, STR)
|
||||
#define print_err(STR) __console_tx_string(BIOS_ERR, STR)
|
||||
#define print_warning(STR) __console_tx_string(BIOS_WARNING, STR)
|
||||
#define print_notice(STR) __console_tx_string(BIOS_NOTICE, STR)
|
||||
#define print_info(STR) __console_tx_string(BIOS_INFO, STR)
|
||||
#define print_debug(STR) __console_tx_string(BIOS_DEBUG, STR)
|
||||
#define print_spew(STR) __console_tx_string(BIOS_SPEW, STR)
|
||||
|
||||
#define print_emerg_char(CH) __console_tx_char(BIOS_EMERG, CH)
|
||||
#define print_alert_char(CH) __console_tx_char(BIOS_ALERT, CH)
|
||||
#define print_crit_char(CH) __console_tx_char(BIOS_CRIT, CH)
|
||||
#define print_err_char(CH) __console_tx_char(BIOS_ERR, CH)
|
||||
#define print_warning_char(CH) __console_tx_char(BIOS_WARNING, CH)
|
||||
#define print_notice_char(CH) __console_tx_char(BIOS_NOTICE, CH)
|
||||
#define print_info_char(CH) __console_tx_char(BIOS_INFO, CH)
|
||||
#define print_debug_char(CH) __console_tx_char(BIOS_DEBUG, CH)
|
||||
#define print_spew_char(CH) __console_tx_char(BIOS_SPEW, CH)
|
||||
|
||||
#define print_emerg_hex8(HEX) __console_tx_hex8(BIOS_EMERG, HEX)
|
||||
#define print_alert_hex8(HEX) __console_tx_hex8(BIOS_ALERT, HEX)
|
||||
#define print_crit_hex8(HEX) __console_tx_hex8(BIOS_CRIT, HEX)
|
||||
#define print_err_hex8(HEX) __console_tx_hex8(BIOS_ERR, HEX)
|
||||
#define print_warning_hex8(HEX) __console_tx_hex8(BIOS_WARNING, HEX)
|
||||
#define print_notice_hex8(HEX) __console_tx_hex8(BIOS_NOTICE, HEX)
|
||||
#define print_info_hex8(HEX) __console_tx_hex8(BIOS_INFO, HEX)
|
||||
#define print_debug_hex8(HEX) __console_tx_hex8(BIOS_DEBUG, HEX)
|
||||
#define print_spew_hex8(HEX) __console_tx_hex8(BIOS_SPEW, HEX)
|
||||
|
||||
#define print_emerg_hex16(HEX) __console_tx_hex16(BIOS_EMERG, HEX)
|
||||
#define print_alert_hex16(HEX) __console_tx_hex16(BIOS_ALERT, HEX)
|
||||
#define print_crit_hex16(HEX) __console_tx_hex16(BIOS_CRIT, HEX)
|
||||
#define print_err_hex16(HEX) __console_tx_hex16(BIOS_ERR, HEX)
|
||||
#define print_warning_hex16(HEX) __console_tx_hex16(BIOS_WARNING, HEX)
|
||||
#define print_notice_hex16(HEX) __console_tx_hex16(BIOS_NOTICE, HEX)
|
||||
#define print_info_hex16(HEX) __console_tx_hex16(BIOS_INFO, HEX)
|
||||
#define print_debug_hex16(HEX) __console_tx_hex16(BIOS_DEBUG, HEX)
|
||||
#define print_spew_hex16(HEX) __console_tx_hex16(BIOS_SPEW, HEX)
|
||||
|
||||
#define print_emerg_hex32(HEX) __console_tx_hex32(BIOS_EMERG, HEX)
|
||||
#define print_alert_hex32(HEX) __console_tx_hex32(BIOS_ALERT, HEX)
|
||||
#define print_crit_hex32(HEX) __console_tx_hex32(BIOS_CRIT, HEX)
|
||||
#define print_err_hex32(HEX) __console_tx_hex32(BIOS_ERR, HEX)
|
||||
#define print_warning_hex32(HEX) __console_tx_hex32(BIOS_WARNING, HEX)
|
||||
#define print_notice_hex32(HEX) __console_tx_hex32(BIOS_NOTICE, HEX)
|
||||
#define print_info_hex32(HEX) __console_tx_hex32(BIOS_INFO, HEX)
|
||||
#define print_debug_hex32(HEX) __console_tx_hex32(BIOS_DEBUG, HEX)
|
||||
#define print_spew_hex32(HEX) __console_tx_hex32(BIOS_SPEW, HEX)
|
||||
|
||||
#endif /* __CONSOLE_EARLY_PRINT_H_ */
|
||||
|
|
@ -23,10 +23,6 @@ void ne2k_append_data(unsigned char *d, int len, unsigned int base);
|
|||
int ne2k_init(unsigned int eth_nic_base);
|
||||
void ne2k_transmit(unsigned int eth_nic_base);
|
||||
|
||||
#ifndef __ROMCC__
|
||||
#define ne2k_append_data_byte(d, base) ne2k_append_data(&d, 1, base)
|
||||
#endif
|
||||
|
||||
#if IS_ENABLED(CONFIG_CONSOLE_NE2K) && (ENV_ROMSTAGE || ENV_RAMSTAGE)
|
||||
static inline void __ne2k_init(void)
|
||||
{
|
||||
|
|
@ -34,7 +30,7 @@ static inline void __ne2k_init(void)
|
|||
}
|
||||
static inline void __ne2k_tx_byte(u8 data)
|
||||
{
|
||||
ne2k_append_data_byte(data, CONFIG_CONSOLE_NE2K_IO_PORT);
|
||||
ne2k_append_data(&data, 1, CONFIG_CONSOLE_NE2K_IO_PORT);
|
||||
}
|
||||
static inline void __ne2k_tx_flush(void)
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in New Issue