skylake: Move I2C bus configuration to separate structure
Move the existing I2C voltage configuration variable into a new structure that is equivalent, similar to how USB ports are configured. This is to make room for additional I2C configuration options like bus speed and whether to enable the bus in early boot which are coming in a subsequent commit. The affected mainboards are updated in this commit so it will build. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Change-Id: Id2dea3df93e49000d60ddc66eb35d06cca6dd47e Reviewed-on: https://review.coreboot.org/15104 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -153,6 +153,8 @@ chip soc/intel/skylake
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register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port
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register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # SD
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register "i2c[4].voltage" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V
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# Must leave UART0 enabled or SD/eMMC will not work as PCI
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register "SerialIoDevMode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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@ -168,9 +170,6 @@ chip soc/intel/skylake
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[PchSerialIoIndexUart2] = PchSerialIoSkipInit,
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}"
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# I2C4 is 1.8V
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register "SerialIoI2cVoltage[4]" = "1"
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# PL2 override 15W
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register "tdp_pl2_override" = "15"
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@ -153,6 +153,8 @@ chip soc/intel/skylake
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register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port 1
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register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # Type-A Port 2
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register "i2c[4].voltage" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V
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# Must leave UART0 enabled or SD/eMMC will not work as PCI
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register "SerialIoDevMode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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@ -168,9 +170,6 @@ chip soc/intel/skylake
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[PchSerialIoIndexUart2] = PchSerialIoPci,
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}"
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# I2C4 is 1.8V
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register "SerialIoI2cVoltage[4]" = "1"
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# PL2 override 15W
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register "tdp_pl2_override" = "15"
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@ -149,7 +149,8 @@ chip soc/intel/skylake
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # SD
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register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port (card)
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register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # Type-A Port (board)
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register "SerialIoI2cVoltage[4]" = "1" # I2C4 is 1.8V
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register "i2c[4].voltage" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V
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# Must leave UART0 enabled or SD/eMMC will not work as PCI
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register "SerialIoDevMode" = "{ \
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@ -153,7 +153,8 @@ chip soc/intel/skylake
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # Type-C Port 2
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register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port (card)
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register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # Type-A Port (board)
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register "SerialIoI2cVoltage[4]" = "1" # I2C4 is 1.8V
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register "i2c[4].voltage" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V
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# Must leave UART0 enabled or SD/eMMC will not work as PCI
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register "SerialIoDevMode" = "{ \
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@ -415,8 +415,9 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
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params->SerialIrqConfigStartFramePulse = config->SerialIrqConfigStartFramePulse;
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params->SkipMpInit = config->FspSkipMpInit;
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memcpy(params->SerialIoI2cVoltage, config->SerialIoI2cVoltage,
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sizeof(params->SerialIoI2cVoltage));
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for (i = 0; i < ARRAY_SIZE(config->i2c); i++)
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params->SerialIoI2cVoltage[i] = config->i2c[i].voltage;
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/*
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* To disable Heci, the Psf needs to be left unlocked
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@ -29,6 +29,18 @@
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#include <soc/usb.h>
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#include <soc/vr_config.h>
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#define SKYLAKE_I2C_DEV_MAX 6
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enum skylake_i2c_voltage {
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I2C_VOLTAGE_3V3,
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I2C_VOLTAGE_1V8
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};
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struct skylake_i2c_config {
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/* Bus voltage level, default is 3.3V */
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enum skylake_i2c_voltage voltage;
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};
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struct soc_intel_skylake_config {
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/*
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* Interrupt Routing configuration
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@ -179,8 +191,8 @@ struct soc_intel_skylake_config {
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*/
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u8 SerialIoDevMode[PchSerialIoIndexMax];
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/* I2C voltage select. Value: 0: 3.3V , 1: 1.8V.*/
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u8 SerialIoI2cVoltage[6];
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/* I2C */
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struct skylake_i2c_config i2c[SKYLAKE_I2C_DEV_MAX];
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/* Camera */
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u8 Cio2Enable;
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