AGESA vendorcode: Move PlatformInstall.h

All thse Option.*Install.h files are about configuring
what eventually is referenced in the final libagesa
build. It's self-contained so isolate these together
with PlatformInstall.h to hide them from rest of
the build.

Change-Id: Id9d90a3366bafc1ad01434599d2ae1302887d88c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21298
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/mainboard/amd/dinar/buildOpts.c

@@ -378,4 +378,4 @@ CONST DEVICE_CAP_OVERRIDE ROMDATA MaranelloOverrideDevCap[2] =
 #include "cpuEarlyInit.h"
 #include "cpuLateInit.h"
 #include "GnbInterfaceStub.h"
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/amd/inagua/buildOpts.c

@@ -291,4 +291,4 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #define DFLT_VRM_SLEW_RATE		(5000)
 
 // Instantiate all solution relevant data.
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/amd/olivehill/buildOpts.c

@@ -339,4 +339,4 @@ GPIO_CONTROL   olivehill_gpio[] = {
 #define DFLT_MEMORY_QUADRANK_TYPE       QUADRANK_UNBUFFERED
 #define DFLT_VRM_SLEW_RATE              (5000)
 
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/amd/parmer/buildOpts.c

@@ -340,4 +340,4 @@ GPIO_CONTROL   parmer_gpio[] = {
 #define DFLT_MEMORY_QUADRANK_TYPE       QUADRANK_UNBUFFERED
 #define DFLT_VRM_SLEW_RATE              (5000)
 
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/amd/persimmon/buildOpts.c

@@ -291,4 +291,4 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #define DFLT_VRM_SLEW_RATE				(5000)
 
 // Instantiate all solution relevant data.
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/amd/south_station/buildOpts.c

@@ -291,4 +291,4 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #define DFLT_VRM_SLEW_RATE              (5000)
 
 // Instantiate all solution relevant data.
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/amd/thatcher/buildOpts.c

@@ -340,4 +340,4 @@ GPIO_CONTROL   thatcher_gpio[] = {
 #define DFLT_MEMORY_QUADRANK_TYPE       QUADRANK_UNBUFFERED
 #define DFLT_VRM_SLEW_RATE              (5000)
 
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/amd/torpedo/buildOpts.c

@@ -218,4 +218,4 @@ CONST AP_MTRR_SETTINGS ROMDATA LlanoApMtrrSettingsList[] =
 #include "cpuEarlyInit.h"
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/amd/union_station/buildOpts.c

@@ -291,4 +291,4 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #define DFLT_VRM_SLEW_RATE              (5000)
 
 // Instantiate all solution relevant data.
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/asrock/e350m1/buildOpts.c

@@ -290,4 +290,4 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #define DFLT_VRM_SLEW_RATE              (5000)
 
 // Instantiate all solution relevant data.
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/asrock/imb-a180/buildOpts.c

@@ -339,4 +339,4 @@ GPIO_CONTROL   imba180_gpio[] = {
 #define DFLT_MEMORY_QUADRANK_TYPE       QUADRANK_UNBUFFERED
 #define DFLT_VRM_SLEW_RATE              (5000)
 
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/asus/f2a85-m/buildOpts.c

@@ -343,4 +343,4 @@ GPIO_CONTROL   f2a85_m_gpio[] = {
 #define DFLT_VRM_SLEW_RATE              (5000)
 
 /* Moving this include up will break AGESA. */
-#include <vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h>
+#include <PlatformInstall.h>

src/mainboard/bap/ode_e20XX/buildOpts.c

@@ -340,4 +340,4 @@ GPIO_CONTROL   gizmo2_gpio[] = {
 #define DFLT_MEMORY_QUADRANK_TYPE       QUADRANK_UNBUFFERED
 #define DFLT_VRM_SLEW_RATE              (5000)
 
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/biostar/am1ml/buildOpts.c

@@ -339,4 +339,4 @@ GPIO_CONTROL   imba180_gpio[] = {
 #define DFLT_MEMORY_QUADRANK_TYPE       QUADRANK_UNBUFFERED
 #define DFLT_VRM_SLEW_RATE              (5000)
 
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/elmex/pcm205400/buildOpts.c

@@ -291,4 +291,4 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #define DFLT_VRM_SLEW_RATE				(5000)
 
 // Instantiate all solution relevant data.
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/gizmosphere/gizmo/buildOpts.c

@@ -293,4 +293,4 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #define DFLT_VRM_SLEW_RATE				(5000)
 
 // Instantiate all solution relevant data.
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/gizmosphere/gizmo2/buildOpts.c

@@ -340,4 +340,4 @@ GPIO_CONTROL   gizmo2_gpio[] = {
 #define DFLT_MEMORY_QUADRANK_TYPE       QUADRANK_UNBUFFERED
 #define DFLT_VRM_SLEW_RATE              (5000)
 
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/hp/abm/buildOpts.c

@@ -353,4 +353,4 @@ GPIO_CONTROL   hp_abm_gpio[] = {
 #define DFLT_MEMORY_QUADRANK_TYPE       QUADRANK_UNBUFFERED
 #define DFLT_VRM_SLEW_RATE              (5000)
 
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c

@@ -387,4 +387,4 @@ SCI_MAP_CONTROL m6_1035dx_sci_map[] = {
 #define DFLT_VRM_SLEW_RATE              (5000)
 
 /* AGESA nonsense: this header depends on the definitions above */
-#include <vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h>
+#include <PlatformInstall.h>

src/mainboard/jetway/nf81-t56n-lf/buildOpts.c

@@ -297,4 +297,4 @@ const AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 
 /* AGESA nonsense: this header depends on the definitions above */
 /* Instantiate all solution relevant data. */
-#include <vendorcode/amd/agesa/f14/Include/PlatformInstall.h>
+#include <PlatformInstall.h>

src/mainboard/lenovo/g505s/buildOpts.c

@@ -387,4 +387,4 @@ SCI_MAP_CONTROL lenovo_g505s_sci_map[] = {
 #define DFLT_VRM_SLEW_RATE              (5000)
 
 /* AGESA nonsense: this header depends on the definitions above */
-#include <vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h>
+#include <PlatformInstall.h>

src/mainboard/lippert/frontrunner-af/buildOpts.c

@@ -292,4 +292,4 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #define DFLT_VRM_SLEW_RATE				(5000)
 
 // Instantiate all solution relevant data.
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/lippert/toucan-af/buildOpts.c

@@ -292,4 +292,4 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #define DFLT_VRM_SLEW_RATE				(5000)
 
 // Instantiate all solution relevant data.
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/mainboard/msi/ms7721/buildOpts.c

@@ -343,4 +343,4 @@ GPIO_CONTROL   ms7721_m_gpio[] = {
 #define DFLT_VRM_SLEW_RATE              (5000)
 
 /* Moving this include up will break AGESA. */
-#include <vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h>
+#include <PlatformInstall.h>

src/mainboard/pcengines/apu1/buildOpts.c

@@ -291,4 +291,4 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
 #define DFLT_VRM_SLEW_RATE				(5000)
 
 // Instantiate all solution relevant data.
-#include "PlatformInstall.h"
+#include <PlatformInstall.h>

src/vendorcode/amd/agesa/Makefile.inc

@@ -18,4 +18,7 @@ else
 $(eval $(call create_class_compiler,libagesa,x86_64))
 endif
 
+$(obj)/romstage/mainboard/$(MAINBOARDDIR)/buildOpts.o: CPPFLAGS_x86_32 += $(BUILDOPTS_INCLUDES)
+$(obj)/ramstage/mainboard/$(MAINBOARDDIR)/buildOpts.o: CPPFLAGS_x86_32 += $(BUILDOPTS_INCLUDES)
+
 endif

src/vendorcode/amd/agesa/f12/Makefile.inc

@@ -38,6 +38,8 @@ AGESA_INC += -I$(AGESA_ROOT)/../common
 AGESA_INC += -I$(AGESA_ROOT)/Include
 AGESA_INC += $(AGESA_AUTOINCLUDES)
 
+BUILDOPTS_INCLUDES = -I$(AGESA_ROOT)/Config $(AGESA_INC)
+
 CFLAGS_x86_32 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
 CFLAGS_x86_64 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
 

src/vendorcode/amd/agesa/f14/Makefile.inc

@@ -38,6 +38,8 @@ AGESA_INC += -I$(AGESA_ROOT)/../common
 AGESA_INC += -I$(AGESA_ROOT)/Include
 AGESA_INC += $(AGESA_AUTOINCLUDES)
 
+BUILDOPTS_INCLUDES = -I$(AGESA_ROOT)/Config $(AGESA_INC)
+
 CFLAGS_x86_32 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
 CFLAGS_x86_64 += -march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-strict-aliasing