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mb/ocp/deltalake: Rearrange slot table for remapping type 9 Slot ID 

Change-Id: I07bdf7f85f8411e04da8a94da7de1e7b93c9e921
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51389
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
This commit is contained in:
Johnny Lin 2021-03-10 11:15:53 +08:00 committed by Patrick Georgi
parent 7c06dd9e26
commit c8ea212dd6
1 changed files with 20 additions and 14 deletions
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34
src/mainboard/ocp/deltalake/ramstage.c
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@ -88,17 +88,17 @@ slot_info slotinfo[] = {
{CSTACK, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0xE8, "SSD1_M2_Data_Drive"},
{PSTACK1, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x10, "SSD0_M2_Boot_Drive"},
{PSTACK1, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x18, "BB_OCP_NIC"},
{PSTACK2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x00, "1OU_JD2_M2_3"},
{PSTACK2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x08, "1OU_JD2_M2_2"},
{PSTACK2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x10, "1OU_JD1_M2_1"},
{PSTACK2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x18, "1OU_JD1_M2_0"},
{PSTACK2, SlotTypePciExpressGen3X16, SlotDataBusWidth16X, 0x00, "1OU_OCP_NIC"},
{PSTACK0, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x00, "2OU_JD1_M2_0"},
{PSTACK0, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x08, "2OU_JD1_M2_1"},
{PSTACK1, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x08, "2OU_JD2_M2_2"},
{PSTACK1, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x00, "2OU_JD2_M2_3"},
{PSTACK0, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x10, "2OU_JD3_M2_4"},
{PSTACK0, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x18, "2OU_JD3_M2_5"},
{PSTACK1, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x00, "2OU_JD2_M2_3"},
{PSTACK1, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x08, "2OU_JD2_M2_2"},
{PSTACK2, SlotTypePciExpressGen3X16, SlotDataBusWidth16X, 0x00, "1OU_OCP_NIC"},
{PSTACK2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x18, "1OU_JD1_M2_0"},
{PSTACK2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x10, "1OU_JD1_M2_1"},
{PSTACK2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x08, "1OU_JD2_M2_2"},
{PSTACK2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x00, "1OU_JD2_M2_3"},
};
#define SPD_REGVID_LEN 6
@ -214,23 +214,29 @@ static int create_smbios_type9(int *handle, unsigned long *current)
continue;
}
if (pcie_config == PCIE_CONFIG_B) {
if (index == 0 || index == 1 || index == 2 || index == 3 || index == 4
|| index == 5 || index == 6)
switch (index) {
case 0 ... 2:
case 10 ... 13:
printk(BIOS_INFO, "Find Config-B slot: %s\n",
slotinfo[index].slot_designator);
else
break;
default:
continue;
}
}
if (pcie_config == PCIE_CONFIG_C) {
if (index == 0 || index == 1 || index == 7 || index == 8 || index == 9
|| index == 10 || index == 11 || index == 12 || index == 13)
switch (index) {
case 0 ... 1:
case 3 ... 9:
printk(BIOS_INFO, "Find Config-C slot: %s\n",
slotinfo[index].slot_designator);
else
break;
default:
continue;
}
}
if (pcie_config == PCIE_CONFIG_D) {
if (index != 13)
if (index != 3)
printk(BIOS_INFO, "Find Config-D slot: %s\n",
slotinfo[index].slot_designator);
else