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cosmetical changes on intel's microcode.c 

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5590 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-05-26 12:53:43 +00:00 committed by Stefan Reinauer
parent 2305f74895
commit c8f8a6cb91
1 changed files with 14 additions and 15 deletions
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29
src/cpu/intel/microcode/microcode.c
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@ -8,27 +8,26 @@
#include <cpu/intel/microcode.h> #include <cpu/intel/microcode.h>
struct microcode { struct microcode {
uint32_t hdrver; u32 hdrver; /* Header Version */
uint32_t rev; u32 rev; /* Patch ID */
uint32_t date; u32 date; /* DATE */
uint32_t sig; u32 sig; /* CPUID */
uint32_t cksum; u32 cksum; /* Checksum */
uint32_t ldrver; u32 ldrver; /* Loader Version */
uint32_t pf; u32 pf; /* Platform ID */
uint32_t data_size; u32 data_size; /* Data size */
uint32_t total_size; u32 total_size; /* Total size */
uint32_t reserved[3]; u32 reserved[3];
uint32_t bits[1012]; u32 bits[1012];
}; };
static inline u32 read_microcode_rev(void)
static inline uint32_t read_microcode_rev(void)
{ {
/* Some Intel Cpus can be very finicky about the /* Some Intel Cpus can be very finicky about the
* cpuid sequence used. So this is implemented in * CPUID sequence used. So this is implemented in
* assembly so that it works reliably. * assembly so that it works reliably.
*/ */
msr_t msr; msr_t msr;
@ -47,7 +46,7 @@ static inline uint32_t read_microcode_rev(void)
: /* inputs */ : /* inputs */
: /* trashed */ : /* trashed */
"ecx" "ecx"
); );
return msr.hi; return msr.hi;
} }