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mb/google/puff: add MST and LSPCON details to devicetree 

Added device hid info to the MST and LSPCON devices.

BRANCH=None
BUG=b:156546414
TEST=Manual tested and able to see update on sysfs and ssdt table

Signed-off-by: Shiyu Sun <sshiyu@chromium.org>
Change-Id: Iaef6c08f241ea671d1487a8524162dbb438b8e98
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Shiyu Sun 2020-06-12 02:41:30 +10:00 committed by Patrick Georgi
parent bc0fc39022
commit c8fa51b877
1 changed files with 16 additions and 2 deletions
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18
src/mainboard/google/hatch/variants/puff/overridetree.cb
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@ -280,8 +280,22 @@ chip soc/intel/cannonlake
# RFU - Reserved for Future Use. # RFU - Reserved for Future Use.
end # I2C #0 end # I2C #0
device pci 15.1 off end # I2C #1 device pci 15.1 off end # I2C #1
device pci 15.2 on end # I2C #2, PCON PS175. device pci 15.2 on
device pci 15.3 on end # I2C #3, Realtek RTD2142. chip drivers/i2c/generic
register "hid" = ""1AF80175""
register "name" = ""PS17""
register "desc" = ""Parade PS175""
device i2c 4a on end
end
end # I2C #2, PCON PS175.
device pci 15.3 on
chip drivers/i2c/generic
register "hid" = ""10EC2142""
register "name" = ""RTD2""
register "desc" = ""Realtek RTD2142""
device i2c 4a on end
end
end # I2C #3, Realtek RTD2142.
device pci 19.0 on device pci 19.0 on
chip drivers/i2c/generic chip drivers/i2c/generic
register "hid" = ""10EC5682"" register "hid" = ""10EC5682""