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soc/intel/jasperlake: Clean up FSP chipset lockdown configuration 

Use a variable to store if the FSP should be responsible for the chipset
lockdown and use it for setting related configuration options. Thus, get
rid of that if-else-clause.

Change-Id: I367554053f78b760ece6d59f79ce1f0e0f9fdfc6
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52845
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Felix Singer 2021-05-03 02:31:01 +02:00 committed by Tim Wawrzynczak
parent 673e6d1c67
commit c8fc542e1b
1 changed files with 5 additions and 11 deletions
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16
src/soc/intel/jasperlake/fsp_params.c
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@ -70,17 +70,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data();
/* Chipset Lockdown */
if (get_lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT) {
params->PchLockDownGlobalSmi = 0;
params->PchLockDownBiosInterface = 0;
params->PchUnlockGpioPads = 1;
params->RtcMemoryLock = 0;
} else {
params->PchLockDownGlobalSmi = 1;
params->PchLockDownBiosInterface = 1;
params->PchUnlockGpioPads = 0;
params->RtcMemoryLock = 1;
}
const bool lockdown_by_fsp = get_lockdown_config() == CHIPSET_LOCKDOWN_FSP;
params->PchLockDownGlobalSmi = lockdown_by_fsp;
params->PchLockDownBiosInterface = lockdown_by_fsp;
params->PchUnlockGpioPads = !lockdown_by_fsp;
params->RtcMemoryLock = lockdown_by_fsp;
/* coreboot will send EOP before loading payload */
params->EndOfPostMessage = EOP_DISABLE;