arm64: add midr_el1 accessor function
Provide access to the MIDR_EL1 register to obtain the main id for determining CPU implementer and part/revision information. BUG=chrome-os-partner:31761 BRANCH=None TEST=Built and printed the output of this function on ryu. Change-Id: I42cec75072fc5e8b48f63c1971840fdc415e4326 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ad19ffe629d9f16b8fd07051ce73533e97fb3f5c Original-Change-Id: I8b8506ebff8e6f9d7c4f96d7ff7e21803972961e Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/216423 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/9032 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -522,6 +522,16 @@ void raw_write_mair_current(uint64_t mair)
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SWITCH_CASE_WRITE(raw_write_mair,mair);
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SWITCH_CASE_WRITE(raw_write_mair,mair);
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}
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}
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/* MIDR */
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uint32_t raw_read_midr_el1(void)
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{
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uint32_t midr_el1;
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__asm__ __volatile__("mrs %0, MIDR_EL1\n\t" : "=r" (midr_el1) : : "memory");
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return midr_el1;
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}
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/* MPIDR */
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/* MPIDR */
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uint64_t raw_read_mpidr_el1(void)
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uint64_t raw_read_mpidr_el1(void)
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{
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{
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@ -214,6 +214,7 @@ uint64_t raw_read_mair_el3(void);
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void raw_write_mair_el3(uint64_t mair_el3);
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void raw_write_mair_el3(uint64_t mair_el3);
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uint64_t raw_read_mair_current(void);
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uint64_t raw_read_mair_current(void);
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void raw_write_mair_current(uint64_t mair);
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void raw_write_mair_current(uint64_t mair);
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uint32_t raw_read_midr_el1(void);
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uint64_t raw_read_mpidr_el1(void);
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uint64_t raw_read_mpidr_el1(void);
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uint32_t raw_read_rmr_el1(void);
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uint32_t raw_read_rmr_el1(void);
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void raw_write_rmr_el1(uint32_t rmr_el1);
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void raw_write_rmr_el1(uint32_t rmr_el1);
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