Update RoadRunner and SpaceRunner config to get in sync with current

standard BIOSes RRLX0013 and SRLX0013.  Specifically move SPI and PME
I/Os to 0x1228 and 0x298 and switch SIO watchdog to ext. 48 MHz CLKIN.

Signed-off-by: Jens Rottmann <JRottmann@LiPPERTEmbedded.de>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5775 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Jens Rottmann 2010-09-03 15:16:36 +00:00 committed by Myles Watson
parent 4e1ac83bb6
commit c914053026
4 changed files with 18 additions and 20 deletions

View File

@ -48,8 +48,8 @@ chip northbridge/amd/lx
irq 0x70 = 7 irq 0x70 = 7
end end
device pnp 2e.4 on # EC device pnp 2e.4 on # EC
io 0x60 = 0x290 io 0x60 = 0x290 # EC
io 0x62 = 0x230 io 0x62 = 0x298 # PME
irq 0x70 = 9 irq 0x70 = 9
end end
device pnp 2e.5 on # PS/2 keyboard device pnp 2e.5 on # PS/2 keyboard
@ -61,8 +61,8 @@ chip northbridge/amd/lx
irq 0x70 = 12 irq 0x70 = 12
end end
device pnp 2e.7 on # GPIO device pnp 2e.7 on # GPIO
io 0x62 = 0x1220 io 0x62 = 0x1220 # Simple I/O
# io 0x64 = 0x1200 # io 0x64 = 0x1228 # SPI
end end
device pnp 2e.8 off # MIDI device pnp 2e.8 off # MIDI
io 0x60 = 0x300 io 0x60 = 0x300

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@ -63,16 +63,15 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
static const u16 sio_init_table[] = { // hi=data, lo=index static const u16 sio_init_table[] = { // hi=data, lo=index
0x0707, // select LDN 7 (GPIO, SPI, watchdog, ...) 0x0707, // select LDN 7 (GPIO, SPI, watchdog, ...)
0x1E2C, // disable ATXPowerGood - will cause a reboot! 0x1E2C, // disable ATXPG; VIN6,FAN4/5,VIN3 enabled, VIN7 internal
0x0423, // don't delay POWerOK1/2 0x1423, // don't delay PoWeROK1/2 - triggers 2nd reset
0x9072, // watchdog triggers POWOK, counts seconds 0x9072, // watchdog triggers PWROK, counts seconds
#if !CONFIG_USE_WATCHDOG_ON_BOOT #if !CONFIG_USE_WATCHDOG_ON_BOOT
0x0073, 0x0074, // disable watchdog by setting timeout to 0 0x0073, 0x0074, // disarm watchdog by changing 56 s timeout to 0
#endif #endif
0xBF25, 0x372A, 0xF326, // select GPIO function for most pins 0xBF25, 0x372A, 0xF326, // select GPIO function for most pins
0xBF27, 0xFF28, 0x2529, // (GP36=FAN_CTL3, GP13=PWROK1) 0xBF27, 0xFF28, 0x2529, // (GP36=FAN_CTL3, GP13=PWROK1)
0x1E2C, // VIN6=enabled?, FAN4/5 enabled, VIN7=internal, VIN3=enabled 0x46B8, 0x0CB9, // enable pullups on RS485_EN
0x46B8, 0x0CB9, // enable pullups
0x36C0, // enable Simple-I/O for GP15,14,12,11= LIVE_LED, WD_ACTIVE, RS485_EN2,1 0x36C0, // enable Simple-I/O for GP15,14,12,11= LIVE_LED, WD_ACTIVE, RS485_EN2,1
0xFFC3, // enable Simple-I/O for GP47-40 (GPIOs on Supervisory Connector) 0xFFC3, // enable Simple-I/O for GP47-40 (GPIOs on Supervisory Connector)
0x26C8, // config GP15,12,11 as output; GP14 as input 0x26C8, // config GP15,12,11 as output; GP14 as input

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@ -49,8 +49,8 @@ chip northbridge/amd/lx
irq 0x70 = 7 irq 0x70 = 7
end end
device pnp 2e.4 on # EC device pnp 2e.4 on # EC
io 0x60 = 0x290 io 0x60 = 0x290 # EC
io 0x62 = 0x230 io 0x62 = 0x298 # PME
irq 0x70 = 9 irq 0x70 = 9
end end
device pnp 2e.5 on # PS/2 keyboard device pnp 2e.5 on # PS/2 keyboard
@ -62,8 +62,8 @@ chip northbridge/amd/lx
irq 0x70 = 12 irq 0x70 = 12
end end
device pnp 2e.7 on # GPIO device pnp 2e.7 on # GPIO
io 0x62 = 0x1220 io 0x62 = 0x1220 # Simple I/O
io 0x64 = 0x1200 io 0x64 = 0x1228 # SPI
end end
device pnp 2e.8 off # MIDI device pnp 2e.8 off # MIDI
io 0x60 = 0x300 io 0x60 = 0x300

View File

@ -129,16 +129,15 @@ static int smc_send_config(unsigned char config_data)
static const u16 sio_init_table[] = { // hi=data, lo=index static const u16 sio_init_table[] = { // hi=data, lo=index
0x0707, // select LDN 7 (GPIO, SPI, watchdog, ...) 0x0707, // select LDN 7 (GPIO, SPI, watchdog, ...)
0x1E2C, // disable ATXPowerGood 0x072C, // VIN6 enabled, FAN4/5 disabled, VIN7,VIN3 internal
0x0423, // don't delay POWerOK1/2 0x1423, // don't delay PoWeROK1/2
0x9072, // watchdog triggers POWOK, counts seconds 0x9072, // watchdog triggers PWROK, counts seconds
#if !CONFIG_USE_WATCHDOG_ON_BOOT #if !CONFIG_USE_WATCHDOG_ON_BOOT
0x0073, 0x0074, // disable watchdog by setting timeout to 0 0x0073, 0x0074, // disarm watchdog by changing 56 s timeout to 0
#endif #endif
0xBF25, 0x172A, 0xF326, // select GPIO function for most pins 0xBF25, 0x172A, 0xF326, // select GPIO function for most pins
0xFF27, 0xDF28, 0x2729, // (GP45=SUSB, GP23,22,16,15=SPI, GP13=PWROK1) 0xFF27, 0xDF28, 0x2729, // (GP45=SUSB, GP23,22,16,15=SPI, GP13=PWROK1)
0x072C, // VIN6=enabled?, FAN4/5 disabled, VIN7=internal, VIN3=internal 0x66B8, 0x0CB9, // enable pullups on SPI, RS485_EN
0x66B8, 0x0CB9, // enable pullups
0x07C0, // enable Simple-I/O for GP12-10= RS485_EN2,1, LIVE_LED 0x07C0, // enable Simple-I/O for GP12-10= RS485_EN2,1, LIVE_LED
0x07C8, // config GP12-10 as output 0x07C8, // config GP12-10 as output
0x2DF5, // map Hw Monitor Thermal Output to GP55 0x2DF5, // map Hw Monitor Thermal Output to GP55