src/arch: Drop unneeded empty lines

Change-Id: Ic86d2e6ad00cf190a2a728280f1a738486cb18c8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/arch/arm/armv4/cache.c

@@ -5,7 +5,6 @@
  * Reference: ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition
  */
 
-
 #include <arch/cache.h>
 
 void tlb_invalidate_all(void)

src/arch/arm/armv7/cache_m.c

@@ -3,7 +3,6 @@
  * cache.c: Cache maintenance routines for ARMv7-M
  */
 
-
 #include <arch/cache.h>
 
 void tlb_invalidate_all(void)

src/arch/arm/fit_payload.c

@@ -28,7 +28,6 @@ static bool fit_place_mem(const struct range_entry *r, void *arg)
 	return true;
 }
 
-
 bool fit_payload_arch(struct prog *payload, struct fit_config_node *config,
 		      struct region *kernel,
 		      struct region *fdt,

src/arch/arm64/armv8/exception.c

@@ -63,10 +63,8 @@ static void print_regs(struct exc_state *exc_state)
 	       regs->x[30], regs->sp);
 }
 
-
 static struct exception_handler *handlers[NUM_EXC_VIDS];
 
-
 int exception_handler_register(uint64_t vid, struct exception_handler *h)
 {
 	if (vid >= NUM_EXC_VIDS)
@@ -122,7 +120,6 @@ static void print_exception_and_die(struct exc_state *state, uint64_t idx)
 	die("exception death");
 }
 
-
 static int handle_exception(struct exc_state *state, uint64_t idx)
 {
 	int ret = EXC_RET_ABORT;

src/arch/arm64/include/armv8/arch/exception.h

@@ -27,7 +27,6 @@ struct exception_handler {
 	struct exception_handler *next;
 };
 
-
 /*
  * Register a handler provided with the associated vector id. Returns 0 on
  * success, < 0 on error. Note that registration is not thread/interrupt safe.

src/arch/ppc64/include/arch/io.h

@@ -17,13 +17,11 @@ static inline void outl(uint32_t value, uint16_t port)
 {
 }
 
-
 static inline uint8_t inb(uint16_t port)
 {
 	return 0;
 }
 
-
 static inline uint16_t inw(uint16_t port)
 {
 	return 0;

src/arch/riscv/include/vm.h

@@ -12,7 +12,6 @@
 
 void mstatus_init(void); // need to setup mstatus so we know we have virtual memory
 
-
 #define DEFINE_MPRV_READ_FLAGS(name, type, insn, flags)			\
 	static inline type name(type *p);				\
 	static inline type name(type *p)				\

src/arch/riscv/misaligned.c

@@ -131,7 +131,6 @@ static struct memory_instruction_info *match_instruction(uintptr_t insn)
 	return NULL;
 }
 
-
 static int fetch_16bit_instruction(uintptr_t vaddr, uintptr_t *insn, int *size)
 {
 	uint16_t ins = mprv_read_mxr_u16((uint16_t *)vaddr);
@@ -157,7 +156,6 @@ static int fetch_32bit_instruction(uintptr_t vaddr, uintptr_t *insn, int *size)
 	return -1;
 }
 
-
 void handle_misaligned(trapframe *tf)
 {
 	uintptr_t insn = 0;

src/arch/riscv/sbi.c

@@ -49,7 +49,6 @@ static uintptr_t sbi_clear_ipi(void)
 	return 0;
 }
 
-
 /*
  * sbi is triggered by the s-mode ecall
  * parameter : register a0 a1 a2

src/arch/x86/cpu.c

@@ -287,7 +287,6 @@ void cpu_initialize(unsigned int index)
 		printk(BIOS_DEBUG, "Using generic CPU ops (good)\n");
 	}
 
-
 	/* Initialize the CPU */
 	if (cpu->ops && cpu->ops->init) {
 		cpu->enabled = 1;

src/arch/x86/exception.c

@@ -180,8 +180,6 @@ static uint32_t gdb_stub_registers[NUM_REGS];
 #define GDB_EXC_SOFTWARE       149 /* Software generated exception */
 #define GDB_EXC_BREAKPOINT     150 /* Breakpoint */
 
-
-
 static unsigned char exception_to_signal[] = {
 	[0]  = GDB_SIGFPE,  /* divide by zero */
 	[1]  = GDB_SIGTRAP, /* debug exception */
@@ -222,7 +220,6 @@ static const char hexchars[] = "0123456789abcdef";
 static char in_buffer[BUFMAX];
 static char out_buffer[BUFMAX];
 
-
 static inline void stub_putc(int ch)
 {
 	gdb_tx_byte(ch);
@@ -283,7 +280,6 @@ static void copy_to_hex(char *buf, void *addr, unsigned long count)
 	*buf = 0;
 }
 
-
 /* convert the hex array pointed to by buf into binary to be placed in mem */
 /* return a pointer to the character AFTER the last byte written */
 static void copy_from_hex(void *addr, char *buf, unsigned long count)
@@ -298,7 +294,6 @@ static void copy_from_hex(void *addr, char *buf, unsigned long count)
 	}
 }
 
-
 /* scan for the sequence $<data>#<checksum>	*/
 
 static int get_packet(char *buffer)

src/arch/x86/include/arch/bert_storage.h

@@ -82,7 +82,6 @@ static inline acpi_hest_generic_data_v300_t *acpi_hest_generic_data3(
 /* Find the address of a Generic Data structure's CPER error record section */
 #define section_of_acpientry(A, B) ((typeof(A))((u8 *)(B) + sizeof(*(B))))
 
-
 /* Add a context to an existing IA32/X64-type error entry */
 cper_ia32x64_context_t *new_cper_ia32x64_ctx(
 		acpi_generic_error_status_t *status,

src/arch/x86/include/arch/io.h

@@ -73,7 +73,6 @@ static inline void outsl(uint16_t port, const void *addr, unsigned long count)
 		);
 }
 
-
 static inline void insb(uint16_t port, void *addr, unsigned long count)
 {
 	__asm__ __volatile__ (

src/arch/x86/include/arch/smp/atomic.h

@@ -67,6 +67,4 @@ static __always_inline void atomic_dec(atomic_t *v)
 		: "m" (v->counter));
 }
 
-
-
 #endif /* ARCH_SMP_ATOMIC_H */

src/arch/x86/include/arch/smp/mpspec.h

@@ -23,7 +23,6 @@
  */
 #define MAX_APICS 16
 
-
 #define SMP_FLOATING_TABLE_LEN sizeof(struct intel_mp_floating)
 
 struct intel_mp_floating {
@@ -130,7 +129,6 @@ enum mp_irq_source_types {
 #define MP_IRQ_TRIGGER_LEVEL	0xc
 #define MP_IRQ_TRIGGER_MASK     0xc
 
-
 struct mpc_config_lintsrc {
 	u8 mpc_type;
 	u8 mpc_irqtype;

src/arch/x86/pirq_routing.c

@@ -28,7 +28,6 @@ static void check_pirq_routing_table(struct irq_routing_table *rt)
 	printk(BIOS_DEBUG, "%s(): Interrupt Routing Table located at %p.\n",
 		     __func__, addr);
 
-
 	sum = rt->checksum - sum;
 
 	if (sum != rt->checksum) {