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soc/amd/cezanne: compress FSP binaries in CBFS 

Compressing the FSP binaries in CBFS reduces the load time.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I0faf9a3937e4a5027eba6327a51060025971450f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49951
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2021-01-26 21:35:39 +01:00
parent 58dfc6c479
commit c963499791
1 changed files with 2 additions and 0 deletions
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src/soc/amd/cezanne/Kconfig
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@ -13,6 +13,8 @@ config SOC_SPECIFIC_OPTIONS
select ARCH_VERSTAGE_X86_32 select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32
select FSP_COMPRESS_FSP_M_LZMA
select FSP_COMPRESS_FSP_S_LZMA
select HAVE_CF9_RESET select HAVE_CF9_RESET
select IDT_IN_EVERY_STAGE select IDT_IN_EVERY_STAGE
select IOAPIC select IOAPIC