soc/amd/common: move block/pi out of the block folder
Since the binaryPI glue code is specific to a binary interface, but not for a hardware block, move it out of the common blocks directory. This also brings the binaryPI support in line with the FSP support which is used on the newer generations. This also drops the SOC_AMD_COMMON_BLOCK_PI Kconfig option and makes use of the already existing SOC_AMD_PI Kconfig option instead. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I014e538f2772938031950475e456cc40dd05d74c Reviewed-on: https://review.coreboot.org/c/coreboot/+/57884 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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@ -5,10 +5,8 @@ config SOC_AMD_COMMON
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if SOC_AMD_COMMON
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if SOC_AMD_COMMON
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config SOC_AMD_PI
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bool
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source "src/soc/amd/common/block/*/Kconfig"
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source "src/soc/amd/common/block/*/Kconfig"
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source "src/soc/amd/common/pi/Kconfig"
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if PLATFORM_USES_FSP2_0
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if PLATFORM_USES_FSP2_0
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@ -1,5 +1,6 @@
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ifeq ($(CONFIG_SOC_AMD_COMMON),y)
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ifeq ($(CONFIG_SOC_AMD_COMMON),y)
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subdirs-y += block
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subdirs-y += block
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subdirs-y += fsp
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subdirs-y += fsp
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subdirs-y += pi
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subdirs-y += vboot
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subdirs-y += vboot
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endif
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endif
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@ -1,4 +1,4 @@
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config SOC_AMD_COMMON_BLOCK_PI
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config SOC_AMD_PI
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bool
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bool
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depends on SOC_AMD_COMMON_BLOCK_ACPI
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depends on SOC_AMD_COMMON_BLOCK_ACPI
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select CACHE_MRC_SETTINGS
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select CACHE_MRC_SETTINGS
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@ -8,7 +8,7 @@ config SOC_AMD_COMMON_BLOCK_PI
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This option builds functions that interface AMD's AGESA reference
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This option builds functions that interface AMD's AGESA reference
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code packaged in the binaryPI form and S3-related functionality.
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code packaged in the binaryPI form and S3-related functionality.
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if SOC_AMD_COMMON_BLOCK_PI
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if SOC_AMD_PI
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config PI_AGESA_CAR_HEAP_BASE
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config PI_AGESA_CAR_HEAP_BASE
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hex
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hex
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@ -34,4 +34,4 @@ config PI_AGESA_HEAP_SIZE
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This option determines the amount of space allowed for AGESA heap
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This option determines the amount of space allowed for AGESA heap
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prior to DRAM availability.
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prior to DRAM availability.
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endif
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endif # SOC_AMD_PI
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@ -1,4 +1,4 @@
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ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PI),y)
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ifeq ($(CONFIG_SOC_AMD_PI),y)
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romstage-y += agesawrapper.c
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romstage-y += agesawrapper.c
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romstage-y += def_callouts.c
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romstage-y += def_callouts.c
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@ -16,4 +16,4 @@ ramstage-y += image.c
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ramstage-y += refcode_loader.c
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ramstage-y += refcode_loader.c
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ramstage-y += s3_resume.c
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ramstage-y += s3_resume.c
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endif # CONFIG_SOC_AMD_COMMON_BLOCK_PI
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endif # CONFIG_SOC_AMD_PI
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@ -36,7 +36,6 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_AMD_COMMON_BLOCK_LPC
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select SOC_AMD_COMMON_BLOCK_LPC
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select SOC_AMD_COMMON_BLOCK_MCA
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select SOC_AMD_COMMON_BLOCK_MCA
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select SOC_AMD_COMMON_BLOCK_PCI
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select SOC_AMD_COMMON_BLOCK_PCI
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select SOC_AMD_COMMON_BLOCK_PI
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select SOC_AMD_COMMON_BLOCK_PM
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select SOC_AMD_COMMON_BLOCK_PM
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select SOC_AMD_COMMON_BLOCK_PSP_GEN1
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select SOC_AMD_COMMON_BLOCK_PSP_GEN1
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select SOC_AMD_COMMON_BLOCK_SATA
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select SOC_AMD_COMMON_BLOCK_SATA
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