mb/google/mancomb: Configure UART0 gpio in early stage
BUG=b:182211161 TEST=builds Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I2d4ec1556ac7136c454eb025ff99aafbf49b8982 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52122 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
parent
335bcf2375
commit
c979dd1e00
|
@ -166,6 +166,10 @@ static const struct soc_amd_gpio early_gpio_table[] = {
|
|||
PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE),
|
||||
/* ESPI_ALERT_L */
|
||||
PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE),
|
||||
/* UART0_RXD */
|
||||
PAD_NF(GPIO_141, UART0_RXD, PULL_NONE),
|
||||
/* UART0_TXD */
|
||||
PAD_NF(GPIO_143, UART0_TXD, PULL_NONE),
|
||||
};
|
||||
|
||||
/* GPIO configuration for sleep */
|
||||
|
|
Loading…
Reference in New Issue