From c97b5af898d21dbc089d336ccd863ccfd6bd965a Mon Sep 17 00:00:00 2001 From: Kevin Cody-Little Date: Wed, 9 May 2018 14:14:59 -0400 Subject: [PATCH] drivers/pc80/tpm: get ioport from pnp records Had 0x2e hardcoded, which is often the SuperIO chip. Instead, pull the port from the PNP tree generated from devicetree.cb, where either 0x4e or 0x2e will be specified. Change-Id: I4a92693f8acd3a1618cefcdf6b25eb22a727e20f Signed-off-by: Kevin Cody-Little Reviewed-on: https://review.coreboot.org/26203 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Philipp Deppenwiese --- src/drivers/pc80/tpm/tis.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/drivers/pc80/tpm/tis.c b/src/drivers/pc80/tpm/tis.c index 714b7e5ed0..3549173210 100644 --- a/src/drivers/pc80/tpm/tis.c +++ b/src/drivers/pc80/tpm/tis.c @@ -904,11 +904,13 @@ static void lpc_tpm_fill_ssdt(struct device *dev) else acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_OFF); + u16 port = dev->path.pnp.port; + /* Resources */ acpigen_write_name("_CRS"); acpigen_write_resourcetemplate_header(); acpigen_write_mem32fixed(1, CONFIG_TPM_TIS_BASE_ADDRESS, 0x5000); - acpigen_write_io16(0x2e, 0x2e, 1, 2, 1); + acpigen_write_io16(port, port, 1, 2, 1); if (CONFIG_TPM_PIRQ) { /*