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intel/i945: Use "IS_ENABLED" for fsbclk & memclk 

Change-Id: I3213a8664955239b10bcf1784ce1ba5e0d95688b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16958
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Elyes HAOUAS 2016-10-09 20:24:20 +02:00 committed by Martin Roth
parent 519c4b7298
commit c9848a82e2
1 changed files with 18 additions and 23 deletions
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15
src/northbridge/intel/i945/raminit.c
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@ -106,10 +106,8 @@ void sdram_dump_mchbar_registers(void)
static int memclk(void) static int memclk(void)
{ {
int offset = 0; int offset = IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM) ? 1 : 0;
#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
offset++;
#endif
switch (((MCHBAR32(CLKCFG) >> 4) & 7) - offset) { switch (((MCHBAR32(CLKCFG) >> 4) & 7) - offset) {
case 1: return 400; case 1: return 400;
case 2: return 533; case 2: return 533;
@ -119,9 +117,9 @@ static int memclk(void)
return -1; return -1;
} }
#if CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM
static u16 fsbclk(void) static u16 fsbclk(void)
{ {
if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM)) {
switch (MCHBAR32(CLKCFG) & 7) { switch (MCHBAR32(CLKCFG) & 7) {
case 0: return 400; case 0: return 400;
case 1: return 533; case 1: return 533;
@ -129,10 +127,7 @@ static u16 fsbclk(void)
default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7); default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7);
} }
return 0xffff; return 0xffff;
} } else if (IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)) {
#elif CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC
static u16 fsbclk(void)
{
switch (MCHBAR32(CLKCFG) & 7) { switch (MCHBAR32(CLKCFG) & 7) {
case 0: return 1066; case 0: return 1066;
case 1: return 533; case 1: return 533;
@ -140,8 +135,8 @@ static u16 fsbclk(void)
default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7); default: printk(BIOS_DEBUG, "fsbclk: unknown register value %x\n", MCHBAR32(CLKCFG) & 7);
} }
return 0xffff; return 0xffff;
}
} }
#endif
static int sdram_capabilities_max_supported_memory_frequency(void) static int sdram_capabilities_max_supported_memory_frequency(void)
{ {