AMD AGESA: Place CAR_GLOBAL in BSP stack

Use BSP CPU's stack space to store CAR GLOBALS for the
duration of romstage before CAR migration.

NOTE: Such globals can only be accessed from BSP CPU due
the way AMD platform has memory architecture set up.

TODO: Add compile-time assertions to verify CAR configuration
matches with the programming in vendorcode.

Change-Id: Ica4700433268f484ce69a24d934732f9cfd4ba41
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3832
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
This commit is contained in:
Kyösti Mälkki 2013-07-29 10:16:14 +03:00
parent 6f9fa8634a
commit c984f4f303
1 changed files with 12 additions and 0 deletions

View File

@ -51,6 +51,18 @@ config UDELAY_LAPIC_FIXED_FSB
int
default 200
# TODO: Sync these with definitions in AGESA vendorcode.
# DCACHE_RAM_BASE must equal BSP_STACK_BASE_ADDR.
# DCACHE_RAM_SIZE must equal BSP_STACK_SIZE.
config DCACHE_RAM_BASE
hex
default 0x30000
config DCACHE_RAM_SIZE
hex
default 0x10000
source src/cpu/amd/agesa/family10/Kconfig
source src/cpu/amd/agesa/family12/Kconfig
source src/cpu/amd/agesa/family14/Kconfig