intel/fsp2_0: Move temporary RAM to .bss with FSP_USES_CB_STACK
The documentation for StackBase and StackSize in FSPM_ARCH_UPD is confusing. Previously the region was shared for heap and stack, starting with FSP2.1 only for heap (or 'temporary RAM') for HOBs. Moving the allocation outside DCACHE_BSP_STACK_SIZE allows use of stack guards and reduces amount of reserved CAR for bootblock and verstage, as the new allocation in .bss is only taken in romstage. BUG=b:140268415 Change-Id: I4cffcc73a89cb97ab7759dd373196ce9753a6307 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35233 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -152,6 +152,11 @@ config FSP_USES_CB_STACK
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without reinitializing stack pointer. This feature is
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without reinitializing stack pointer. This feature is
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supported Icelake onwards.
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supported Icelake onwards.
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config FSP_TEMP_RAM_SIZE
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hex
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default 0x10000
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depends on FSP_USES_CB_STACK
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config VERIFY_HOBS
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config VERIFY_HOBS
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bool "Verify the FSP hand-off-blocks"
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bool "Verify the FSP hand-off-blocks"
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default n
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default n
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@ -34,6 +34,8 @@
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#include <fsp/memory_init.h>
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#include <fsp/memory_init.h>
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#include <types.h>
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#include <types.h>
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static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t));
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/* TPM MRC hash functionality depends on vboot starting before memory init. */
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/* TPM MRC hash functionality depends on vboot starting before memory init. */
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_Static_assert(!CONFIG(FSP2_0_USES_TPM_MRC_HASH) ||
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_Static_assert(!CONFIG(FSP2_0_USES_TPM_MRC_HASH) ||
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CONFIG(VBOOT_STARTS_IN_BOOTBLOCK),
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CONFIG(VBOOT_STARTS_IN_BOOTBLOCK),
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@ -161,23 +163,13 @@ static enum cb_err check_region_overlap(const struct memranges *ranges,
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return CB_SUCCESS;
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return CB_SUCCESS;
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}
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}
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static enum cb_err setup_fsp_stack_frame(FSPM_ARCH_UPD *arch_upd,
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static enum cb_err setup_fsp_stack_frame(FSPM_ARCH_UPD *arch_upd,
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const struct memranges *memmap)
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const struct memranges *memmap)
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{
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{
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uintptr_t stack_begin;
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uintptr_t stack_begin;
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uintptr_t stack_end;
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uintptr_t stack_end;
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/*
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* FSP 2.1 version would use same stack as coreboot instead of
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* setting up seprate stack frame. FSP 2.1 would not relocate stack
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* top and does not reinitialize stack pointer.
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*/
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if (CONFIG(FSP_USES_CB_STACK)) {
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arch_upd->StackBase = (void *)_car_stack_start;
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arch_upd->StackSize = CONFIG_DCACHE_BSP_STACK_SIZE;
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return CB_SUCCESS;
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}
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/*
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/*
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* FSPM_UPD passed here is populated with default values
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* FSPM_UPD passed here is populated with default values
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* provided by the blob itself. We let FSPM use top of CAR
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* provided by the blob itself. We let FSPM use top of CAR
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@ -197,8 +189,19 @@ static enum cb_err fsp_fill_common_arch_params(FSPM_ARCH_UPD *arch_upd,
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bool s3wake, uint32_t fsp_version,
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bool s3wake, uint32_t fsp_version,
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const struct memranges *memmap)
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const struct memranges *memmap)
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{
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{
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if (setup_fsp_stack_frame(arch_upd, memmap))
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/*
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* FSP 2.1 version would use same stack as coreboot instead of
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* setting up separate stack frame. FSP 2.1 would not relocate stack
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* top and does not reinitialize stack pointer. The parameters passed
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* as StackBase and StackSize are actually for temporary RAM and HOBs
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* and are not related to FSP stack at all.
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*/
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if (CONFIG(FSP_USES_CB_STACK)) {
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arch_upd->StackBase = temp_ram;
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arch_upd->StackSize = sizeof(temp_ram);
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} else if (setup_fsp_stack_frame(arch_upd, memmap)) {
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return CB_ERR;
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return CB_ERR;
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}
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fsp_fill_mrc_cache(arch_upd, fsp_version);
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fsp_fill_mrc_cache(arch_upd, fsp_version);
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