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mb/google/dedede/var/sasuke: Update DPTF parameters 

Remove TSR2, use DPTF parameters from internal thermal team.

BUG=b:183749595
BRANCH=dedede
TEST=emerge-dedede coreboot

Change-Id: I3182b96bf36c8d07299fe435a29e6b8c0b8a6927
Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51970
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
This commit is contained in:
Seunghwan Kim 2021-03-31 15:37:49 +09:00 committed by Karthik Ramasubramanian
parent 6ffaf5a691
commit c988d0516c
1 changed files with 39 additions and 0 deletions
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39
src/mainboard/google/dedede/variants/sasuke/overridetree.cb
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@ -80,6 +80,45 @@ chip soc/intel/jasperlake
},
}"
device domain 0 on
device pci 04.0 on
chip drivers/intel/dptf
register "options.tsr[0].desc" = ""Charger""
register "options.tsr[1].desc" = ""Vcore""
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 90, 10000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 60, 60000),
[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 60, 15000),
}"
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN),
}"
register "controls.power_limits" = "{
.pl1 = {
.min_power = 6000,
.max_power = 6000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 200,
},
.pl2 = {
.min_power = 20000,
.max_power = 20000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 1000,
}
}"
register "controls.charger_perf" = "{
[0] = { 255, 3000 },
[1] = { 24, 2500 },
[2] = { 16, 2000 },
[3] = { 8, 1500 }
}"
device generic 0 on end
end
end # SA Thermal device
device pci 14.0 on
chip drivers/usb/acpi
device usb 0.0 on