Fix for nehemiah
other fixes for gx2 ram init. support for sharplfg00l04 -- not working yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
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d96e098def
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c994c973c6
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@ -19,6 +19,24 @@
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#include "southbridge/amd/cs5535/cs5535_early_smbus.c"
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#include "southbridge/amd/cs5535/cs5535_early_setup.c"
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#include "northbridge/amd/gx2/raminit.h"
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static void sdram_set_spd_registers(const struct mem_controller *ctrl) {
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msr_t msr;
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/* 1. Initialize GLMC registers base on SPD values,
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* Hard coded as XpressROM for now */
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//print_debug("sdram_enable step 1\r\n");
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msr = rdmsr(0x20000018);
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msr.hi = 0x10076013;
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msr.lo = 0x00003000;
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wrmsr(0x20000018, msr);
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msr = rdmsr(0x20000019);
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msr.hi = 0x18000108;
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msr.lo = 0x696332a3;
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wrmsr(0x20000019, msr);
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}
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#include "northbridge/amd/gx2/raminit.c"
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#include "sdram/generic_sdram.c"
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@ -19,11 +19,32 @@
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#include "southbridge/amd/cs5535/cs5535_early_smbus.c"
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#include "southbridge/amd/cs5535/cs5535_early_setup.c"
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#include "northbridge/amd/gx2/raminit.h"
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/* this has to be done on a per-mainboard basis, esp. if you don't have smbus */
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static void sdram_set_spd_registers(const struct mem_controller *ctrl)
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{
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msr_t msr;
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/* 1. Initialize GLMC registers base on SPD values,
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* Hard coded as XpressROM for now */
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//print_debug("sdram_enable step 1\r\n");
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msr = rdmsr(0x20000018);
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msr.hi = 0x10076013;
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msr.lo = 0x3400;
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wrmsr(0x20000018, msr);
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msr = rdmsr(0x20000019);
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msr.hi = 0x18000008;
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msr.lo = 0x696332a3;
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wrmsr(0x20000019, msr);
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}
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#include "northbridge/amd/gx2/raminit.c"
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#include "sdram/generic_sdram.c"
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#include "northbridge/amd/gx2/pll_reset.c"
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static void msr_init(void)
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{
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__builtin_wrmsr(0x1808, 0x10f3bf00, 0x22fffc02);
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@ -63,15 +84,15 @@ static void main(unsigned long bist)
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console_init();
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cs5535_early_setup();
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print_err("done cs5535 early\n");
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pll_reset();
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print_err("done pll_reset\n");
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/* Halt if there was a built in self test failure */
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//report_bist_failure(bist);
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sdram_initialize(1, memctrl);
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print_err("Done sdram_initialize\n");
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/* Check all of memory */
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ram_check(0x00000000, 640*1024);
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@ -30,6 +30,11 @@ void write_protect_vgabios(void)
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device_t dev;
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printk_info("write_protect_vgabios\n");
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/* there are two possible devices. Just do both. */
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dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0);
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if(dev)
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pci_write_config8(dev, 0x61, 0xaa);
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dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3123, 0);
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if(dev)
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pci_write_config8(dev, 0x61, 0xaa);
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@ -122,9 +122,14 @@ static void pll_reset(void)
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/* get CPU core clock in MHZ */
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cpu_core = calibrate_tsc();
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get_memory_speed();
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print_debug("Cpu core is ");
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print_debug_hex32(cpu_core);
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print_debug("\n");
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//get_memory_speed();
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//msr = rdmsr(GLCP_SYS_RSTPLL);
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msr = rdmsr(0x4c000014);
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print_debug("4c000014 is ");
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print_debug_hex32(msr.hi); print_debug(":"); print_debug_hex32(msr.lo); print_debug("\n");
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if (msr.lo & (1 << GLCP_SYS_RSTPLL_BYPASS)) {
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print_debug("disable PLL bypass\n\r");
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@ -162,7 +167,7 @@ static void pll_reset(void)
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print_debug("\n\r");
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//gliu = get_memory_speed();
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get_memory_speed();
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//get_memory_speed();
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//print_debug("Target Memory Clock ");
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//print_debug_hex32(gliu);
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//print_debug("\n\r");
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@ -4,10 +4,6 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
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{
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}
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static void sdram_set_spd_registers(const struct mem_controller *ctrl)
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{
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}
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/* Section 6.1.3, LX processor databooks, BIOS Initialization Sequence
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* Section 4.1.4, GX/CS5535 GeodeROM Porting guide */
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@ -16,19 +12,6 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
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int i;
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msr_t msr;
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/* 1. Initialize GLMC registers base on SPD values,
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* Hard coded as XpressROM for now */
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//print_debug("sdram_enable step 1\r\n");
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msr = rdmsr(0x20000018);
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msr.hi = 0x10076013;
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msr.lo = 0x00003000;
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wrmsr(0x20000018, msr);
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msr = rdmsr(0x20000019);
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msr.hi = 0x18000108;
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msr.lo = 0x696332a3;
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wrmsr(0x20000019, msr);
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/* 2. clock gating for PMode */
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msr = rdmsr(0x20002004);
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msr.lo &= ~0x04;
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@ -103,10 +103,15 @@ static int cs5535_early_setup(void)
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print_debug("reboot from BIOS reset\n\r");
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return;
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}
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print_debug("Setup idsel\r\n");
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cs5535_setup_idsel();
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print_debug("Setup iobase\r\n");
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cs5535_setup_iobase();
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print_debug("Setup gpio\r\n");
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cs5535_setup_gpio();
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print_debug("Setup cis_mode\r\n");
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cs5535_setup_cis_mode();
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print_debug("Setup smbus\r\n");
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cs5535_enable_smbus();
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//get_memory_speed();
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dummy();
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@ -89,7 +89,7 @@ struct flashchip flashchips[] = {
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probe_md2802, erase_md2802, write_md2802, read_md2802},
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#endif
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{"LHF00L04", SHARP_ID, SHARP_LHF00L04, NULL, 1024, 64 * 1024,
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probe_82802ab, erase_82802ab, write_82802ab, NULL},
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probe_lhf00l04, erase_lhf00l04, write_lhf00l04, NULL},
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{NULL,}
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};
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@ -1,9 +1,8 @@
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/*
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* sst28sf040.c: driver for SST28SF040C flash models.
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* lhf00l04.c: driver for programming JEDEC standard flash parts
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*
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*
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* Copyright 2000 Silicon Integrated System Corporation
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* Copyright 2005 coresystems GmbH <stepan@openbios.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -20,113 +19,166 @@
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*
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* Reference:
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* 8 MEgabit (1024K x 8) SHARP LHF00L04, data sheet
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* Reference: http://www.intel.com/design/chipsets/datashts/290658.htm
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*
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* $Id: lhf00l04.c 2111 2005-11-26 21:55:36Z ollie $
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*/
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#include <errno.h>
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#include <fcntl.h>
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#include <sys/mman.h>
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#include <sys/io.h>
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#include <unistd.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include "flash.h"
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#include "sharplhf00l04.h"
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#include "debug.h"
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#define AUTO_PG_ERASE1 0x20
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#define AUTO_PG_ERASE2 0xD0
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#define AUTO_PGRM 0x10
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#define CHIP_ERASE 0x30
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#define RESET 0xFF
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#define READ_ID 0x90
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static __inline__ void protect_lhf00l04(volatile uint8_t *bios)
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// I need that Berkeley bit-map printer
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void print_lhf00l04_status(uint8_t status)
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{
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/* ask compiler not to optimize this */
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// volatile uint8_t tmp;
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}
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static __inline__ void unprotect_lhf00l04(volatile uint8_t *bios)
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{
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/* ask compiler not to optimize this */
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// volatile uint8_t tmp;
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}
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static __inline__ int erase_sector_lhf00l04(volatile uint8_t *bios,
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unsigned long address)
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{
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return (0);
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}
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static __inline__ int write_sector_lhf00l04(volatile uint8_t *bios,
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uint8_t *src,
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volatile uint8_t *dst,
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unsigned int page_size)
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{
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int i;
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for (i = 0; i < page_size; i++) {
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/* transfer data from source to destination */
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if (*src == 0xFF) {
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dst++, src++;
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/* If the data is 0xFF, don't program it */
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continue;
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}
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/*issue AUTO PROGRAM command */
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*dst = AUTO_PGRM;
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*dst++ = *src++;
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/* wait for Toggle bit ready */
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// toggle_ready_jedec(bios);
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}
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return (0);
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printf("%s", status & 0x80 ? "Ready:" : "Busy:");
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printf("%s", status & 0x40 ? "BE SUSPEND:" : "BE RUN/FINISH:");
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printf("%s", status & 0x20 ? "BE ERROR:" : "BE OK:");
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printf("%s", status & 0x10 ? "PROG ERR:" : "PROG OK:");
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printf("%s", status & 0x8 ? "VP ERR:" : "VPP OK:");
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printf("%s", status & 0x4 ? "PROG SUSPEND:" : "PROG RUN/FINISH:");
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printf("%s", status & 0x2 ? "WP|TBL#|WP#,ABORT:" : "UNLOCK:");
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}
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int probe_lhf00l04(struct flashchip *flash)
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{
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volatile uint8_t *bios = flash->virt_addr;
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uint8_t id1, id2, tmp;
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uint8_t id1, id2;
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/* save the value at the beginning of the Flash */
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tmp = *bios;
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#if 0
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*(volatile uint8_t *) (bios + 0x5555) = 0xAA;
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*(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
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*(volatile uint8_t *) (bios + 0x5555) = 0x90;
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#endif
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*bios = RESET;
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*bios = 0xff;
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myusec_delay(10);
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*bios = 0x90;
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myusec_delay(10);
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*bios = READ_ID;
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myusec_delay(10);
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id1 = *(volatile uint8_t *) bios;
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myusec_delay(10);
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id2 = *(volatile uint8_t *) (bios + 0x01);
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*bios = RESET;
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#if 1
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*(volatile uint8_t *) (bios + 0x5555) = 0xAA;
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*(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
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*(volatile uint8_t *) (bios + 0x5555) = 0xF0;
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#endif
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myusec_delay(10);
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printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2);
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if (id1 == flash->manufacture_id && id2 == flash->model_id)
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return 1;
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/* if there is no lhf00l04, restore the original value */
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*bios = tmp;
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if (id1 == flash->manufacture_id && id2 == flash->model_id) {
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size_t size = flash->total_size * 1024;
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// we need to mmap the write-protect space.
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bios = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
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flash->fd_mem, (off_t) (0 - 0x400000 - size));
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if (bios == MAP_FAILED) {
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// it's this part but we can't map it ...
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perror("Error MMAP /dev/mem");
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exit(1);
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}
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flash->virt_addr_2 = bios;
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printf("bios %p, *bios 0x%x, bios[1] 0x%x\n", bios, *bios, bios[1]);
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return 1;
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}
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return 0;
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}
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uint8_t wait_lhf00l04(volatile uint8_t *bios)
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{
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uint8_t status;
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uint8_t id1, id2;
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*bios = 0x70;
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if ((*bios & 0x80) == 0) { // it's busy
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while ((*bios & 0x80) == 0);
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}
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status = *bios;
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// put another command to get out of status register mode
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*bios = 0x90;
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myusec_delay(10);
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id1 = *(volatile uint8_t *) bios;
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id2 = *(volatile uint8_t *) (bios + 0x01);
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// this is needed to jam it out of "read id" mode
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*(volatile uint8_t *) (bios + 0x5555) = 0xAA;
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*(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
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*(volatile uint8_t *) (bios + 0x5555) = 0xF0;
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return status;
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}
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int erase_lhf00l04_block(struct flashchip *flash, int offset)
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{
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volatile uint8_t *bios = flash->virt_addr + offset;
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volatile uint8_t *wrprotect =
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flash->virt_addr_2 + offset + 2;
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uint8_t status;
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// clear status register
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*bios = 0x50;
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printf("Erase at %p\n", bios);
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status = wait_lhf00l04(flash->virt_addr);
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print_lhf00l04_status(status);
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// clear write protect
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printf("write protect is at %p\n", (wrprotect));
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printf("write protect is 0x%x\n", *(wrprotect));
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*(wrprotect) = 0;
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printf("write protect is 0x%x\n", *(wrprotect));
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// now start it
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*(volatile uint8_t *) (bios) = 0x20;
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*(volatile uint8_t *) (bios) = 0xd0;
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myusec_delay(10);
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// now let's see what the register is
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status = wait_lhf00l04(flash->virt_addr);
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print_lhf00l04_status(status);
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printf("DONE BLOCK 0x%x\n", offset);
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return (0);
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}
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int erase_lhf00l04(struct flashchip *flash)
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{
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volatile uint8_t *bios = flash->virt_addr;
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unprotect_lhf00l04(bios);
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*bios = CHIP_ERASE;
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*bios = CHIP_ERASE;
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protect_lhf00l04(bios);
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myusec_delay(10);
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// toggle_ready_jedec(bios);
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int i;
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unsigned int total_size = flash->total_size * 1024;
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printf("total_size is %d; flash->page_size is %d\n",
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total_size, flash->page_size);
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for (i = 0; i < total_size; i += flash->page_size)
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erase_lhf00l04_block(flash, i);
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printf("DONE ERASE\n");
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return (0);
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}
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void write_page_lhf00l04(volatile uint8_t *bios, uint8_t *src, volatile uint8_t *dst,
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int page_size)
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{
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int i;
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for (i = 0; i < page_size; i++) {
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/* transfer data from source to destination */
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*dst = 0x40;
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*dst++ = *src++;
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wait_lhf00l04(bios);
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}
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}
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int write_lhf00l04(struct flashchip *flash, uint8_t *buf)
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{
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int i;
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@ -134,22 +186,20 @@ int write_lhf00l04(struct flashchip *flash, uint8_t *buf)
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flash->page_size;
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volatile uint8_t *bios = flash->virt_addr;
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unprotect_lhf00l04(bios);
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erase_lhf00l04(flash);
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if (*bios != 0xff) {
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printf("ERASE FAILED\n");
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return -1;
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}
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printf("Programming Page: ");
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for (i = 0; i < total_size / page_size; i++) {
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/* erase the page before programming */
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erase_sector_lhf00l04(bios, i * page_size);
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/* write to the sector */
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printf("%04d at address: 0x%08x", i, i * page_size);
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write_sector_lhf00l04(bios, buf + i * page_size,
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bios + i * page_size, page_size);
|
||||
printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
|
||||
write_page_lhf00l04(bios, buf + i * page_size,
|
||||
bios + i * page_size, page_size);
|
||||
printf
|
||||
("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
|
||||
}
|
||||
printf("\n");
|
||||
|
||||
protect_lhf00l04(bios);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
|
|
@ -4,5 +4,44 @@
|
|||
extern int probe_lhf00l04(struct flashchip *flash);
|
||||
extern int erase_lhf00l04(struct flashchip *flash);
|
||||
extern int write_lhf00l04(struct flashchip *flash, uint8_t *buf);
|
||||
extern __inline__ void toggle_ready_lhf00l04(volatile uint8_t *dst)
|
||||
{
|
||||
unsigned int i = 0;
|
||||
uint8_t tmp1, tmp2;
|
||||
|
||||
tmp1 = *dst & 0x40;
|
||||
|
||||
while (i++ < 0xFFFFFF) {
|
||||
tmp2 = *dst & 0x40;
|
||||
if (tmp1 == tmp2) {
|
||||
break;
|
||||
}
|
||||
tmp1 = tmp2;
|
||||
}
|
||||
}
|
||||
|
||||
extern __inline__ void data_polling_lhf00l04(volatile uint8_t *dst, uint8_t data)
|
||||
{
|
||||
unsigned int i = 0;
|
||||
uint8_t tmp;
|
||||
|
||||
data &= 0x80;
|
||||
|
||||
while (i++ < 0xFFFFFF) {
|
||||
tmp = *dst & 0x80;
|
||||
if (tmp == data) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
extern __inline__ void protect_lhf00l04(volatile uint8_t *bios)
|
||||
{
|
||||
*(volatile uint8_t *) (bios + 0x5555) = 0xAA;
|
||||
*(volatile uint8_t *) (bios + 0x2AAA) = 0x55;
|
||||
*(volatile uint8_t *) (bios + 0x5555) = 0xA0;
|
||||
|
||||
usleep(200);
|
||||
}
|
||||
|
||||
#endif /* !__SHARPLHF00L04_H__ */
|
||||
|
|
Loading…
Reference in New Issue