Bob: Update the memory ramid of bob

Update the memory ramid.
Move to one CA training pattern.

BUG=chrome-os-partner:59454
BRANCH=firmware-gru-8785.B
TEST=Build firmware passed

Change-Id: Ic05cbc1700a13e372f63d5202459add0e984f9d8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1030a78af3d489d13508f17a79df1e65bd5afa3b
Original-Change-Id: Ibe8acb5b698cec1adcdddbb13d35a5e20a5b8c0d
Original-Reviewed-on: https://chromium-review.googlesource.com/414664
Original-Commit-Ready: Shasha Zhao <Sarah_Zhao@asus.com>
Original-Tested-by: Shasha Zhao <Sarah_Zhao@asus.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Change-Id: I0ae46e496cd18492a2b6c7167081798c2f2479b1
Original-Signed-off-by: Shasha Zhao <Sarah_Zhao@asus.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/411645
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/17679
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Shasha Zhao 2016-11-17 12:42:51 +08:00 committed by Martin Roth
parent 6bd75ec942
commit c99526cce9
11 changed files with 95 additions and 3276 deletions

View File

@ -352,7 +352,7 @@ void mainboard_power_on_backlight(void)
{ {
gpio_output(GPIO(1, C, 1), 1); /* BL_EN */ gpio_output(GPIO(1, C, 1), 1); /* BL_EN */
if ((IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU) || IS_ENABLED(CONFIG_BOARD_GOOGLE_BOB)) && board_id() == 0) if (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU) && board_id() == 0)
enable_backlight_booster(); enable_backlight_booster();
} }

View File

@ -48,8 +48,7 @@ void pwm_regulator_configure(enum pwm_regulator pwm, int millivolt)
voltage_min = PWM_DESIGN_VOLTAGE_MIN; voltage_min = PWM_DESIGN_VOLTAGE_MIN;
voltage_max = PWM_DESIGN_VOLTAGE_MAX; voltage_max = PWM_DESIGN_VOLTAGE_MAX;
if (!(IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN) && board_id() < 6) && if (!(IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN) && board_id() < 6) &&
!(IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU) && board_id() < 2) && !(IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU) && board_id() < 2)) {
!(IS_ENABLED(CONFIG_BOARD_GOOGLE_BOB) && board_id() < 2)) {
voltage_min = pwm_design_voltage_later[pwm][0]; voltage_min = pwm_design_voltage_later[pwm][0];
voltage_max = pwm_design_voltage_later[pwm][1]; voltage_max = pwm_design_voltage_later[pwm][1];
} }

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@ -23,67 +23,23 @@
#include <types.h> #include <types.h>
static const char *sdram_configs[] = { static const char *sdram_configs[] = {
#if IS_ENABLED(CONFIG_BOARD_GOOGLE_BOB) [0] = "sdram-lpddr3-hynix-4GB",
"sdram-lpddr3-samsung-2GB-24EB", [3] = "sdram-lpddr3-samsung-2GB-24EB",
"sdram-lpddr3-micron-2GB", [4] = "sdram-lpddr3-micron-2GB",
"sdram-lpddr3-samsung-4GB-04EB", [5] = "sdram-lpddr3-samsung-4GB-04EB",
"sdram-lpddr3-micron-4GB", [6] = "sdram-lpddr3-micron-4GB",
#else
"sdram-lpddr3-hynix-4GB-666",
"sdram-lpddr3-hynix-4GB-800",
"sdram-lpddr3-hynix-4GB-933",
#endif
}; };
static struct rk3399_sdram_params params; static struct rk3399_sdram_params params;
#if IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU) || \
IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN)
enum dram_speeds {
dram_666MHz = 0,
dram_800MHz = 1,
dram_933MHz = 2,
};
static enum dram_speeds get_sdram_index(void)
{
uint32_t id;
id = board_id();
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN))
switch (id) {
case 4:
return dram_800MHz;
default:
return dram_933MHz;
}
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU))
return dram_800MHz;
}
#endif
const struct rk3399_sdram_params *get_sdram_config() const struct rk3399_sdram_params *get_sdram_config()
{ {
#if IS_ENABLED(CONFIG_BOARD_GOOGLE_BOB) uint32_t ramcode;
u32 ramcode = ram_code();
/* ramcode = ram_code();
* through schematic, ramid arrange like following: if (ramcode >= ARRAY_SIZE(sdram_configs) || !sdram_configs[ramcode] ||
* 0: sdram-lpddr3-samsung-2GB-24EB (cbfs_boot_load_struct(sdram_configs[ramcode],
* 2: sdram-lpddr3-micron-2GB &params, sizeof(params)) != sizeof(params)))
* 4: sdram-lpddr3-samsung-4GB-04EB
* 6: sdram-lpddr3-micron-4GB
*/
ramcode = ramcode / 2;
if (cbfs_boot_load_struct(sdram_configs[ramcode],
&params, sizeof(params)) != sizeof(params))
#else
if (cbfs_boot_load_struct(sdram_configs[get_sdram_index()],
&params, sizeof(params)) != sizeof(params))
#endif
die("Cannot load SDRAM parameter file!"); die("Cannot load SDRAM parameter file!");
return &params; return &params;
} }

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@ -14,17 +14,11 @@
## ##
sdram-params := sdram-params :=
sdram-params += sdram-lpddr3-hynix-4GB
ifeq ($(CONFIG_BOARD_GOOGLE_BOB),y) sdram-params += sdram-lpddr3-samsung-2GB-24EB
sdram-params += sdram-lpddr3-micron-2GB sdram-params += sdram-lpddr3-micron-2GB
sdram-params += sdram-lpddr3-micron-4GB sdram-params += sdram-lpddr3-samsung-4GB-04EB
sdram-params += sdram-lpddr3-samsung-2GB-24EB sdram-params += sdram-lpddr3-micron-4GB
sdram-params += sdram-lpddr3-samsung-4GB-04EB
else
sdram-params += sdram-lpddr3-hynix-4GB-666
sdram-params += sdram-lpddr3-hynix-4GB-800
sdram-params += sdram-lpddr3-hynix-4GB-933
endif
$(foreach params,$(sdram-params), \ $(foreach params,$(sdram-params), \
$(eval cbfs-files-y += $(params)) \ $(eval cbfs-files-y += $(params)) \

View File

@ -58,7 +58,7 @@ struct rk3399_sdram_params params = {
.ddr_freq = 933*MHz, .ddr_freq = 933*MHz,
.dramtype = LPDDR3, .dramtype = LPDDR3,
.num_channels = 2, .num_channels = 2,
.stride = 13, .stride = 9,
.odt = 1, .odt = 1,
{ {
{ {
@ -318,10 +318,10 @@ struct rk3399_sdram_params params = {
0x00000000, /* DENALI_CTL_253_DATA */ 0x00000000, /* DENALI_CTL_253_DATA */
0x00000000, /* DENALI_CTL_254_DATA */ 0x00000000, /* DENALI_CTL_254_DATA */
0x00000000, /* DENALI_CTL_255_DATA */ 0x00000000, /* DENALI_CTL_255_DATA */
0x000556aa, /* DENALI_CTL_256_DATA */ 0x000fffff, /* DENALI_CTL_256_DATA */
0x000aaaaa, /* DENALI_CTL_257_DATA */ 0x00000000, /* DENALI_CTL_257_DATA */
0x000fffff, /* DENALI_CTL_258_DATA */ 0x000556aa, /* DENALI_CTL_258_DATA */
0x00000000, /* DENALI_CTL_259_DATA */ 0x000aaaaa, /* DENALI_CTL_259_DATA */
0x000b3133, /* DENALI_CTL_260_DATA */ 0x000b3133, /* DENALI_CTL_260_DATA */
0x0004cd33, /* DENALI_CTL_261_DATA */ 0x0004cd33, /* DENALI_CTL_261_DATA */
0x0004cecc, /* DENALI_CTL_262_DATA */ 0x0004cecc, /* DENALI_CTL_262_DATA */
@ -1131,14 +1131,14 @@ struct rk3399_sdram_params params = {
0x00917531, /* DENALI_PHY_526_DATA */ 0x00917531, /* DENALI_PHY_526_DATA */
0x00806420, /* DENALI_PHY_527_DATA */ 0x00806420, /* DENALI_PHY_527_DATA */
0x01917531, /* DENALI_PHY_528_DATA */ 0x01917531, /* DENALI_PHY_528_DATA */
0x00020103, /* DENALI_PHY_529_DATA */ 0x02020003, /* DENALI_PHY_529_DATA */
0x00000000, /* DENALI_PHY_530_DATA */ 0x00000000, /* DENALI_PHY_530_DATA */
0x00000000, /* DENALI_PHY_531_DATA */ 0x00000000, /* DENALI_PHY_531_DATA */
0x00000000, /* DENALI_PHY_532_DATA */ 0x00000000, /* DENALI_PHY_532_DATA */
0x000556aa, /* DENALI_PHY_533_DATA */ 0x000fffff, /* DENALI_PHY_533_DATA */
0x000aaaaa, /* DENALI_PHY_534_DATA */ 0x00000000, /* DENALI_PHY_534_DATA */
0x000fffff, /* DENALI_PHY_535_DATA */ 0x000556aa, /* DENALI_PHY_535_DATA */
0x00000000, /* DENALI_PHY_536_DATA */ 0x000aaaaa, /* DENALI_PHY_536_DATA */
0x000b3133, /* DENALI_PHY_537_DATA */ 0x000b3133, /* DENALI_PHY_537_DATA */
0x0004cd33, /* DENALI_PHY_538_DATA */ 0x0004cd33, /* DENALI_PHY_538_DATA */
0x0004cecc, /* DENALI_PHY_539_DATA */ 0x0004cecc, /* DENALI_PHY_539_DATA */
@ -1259,14 +1259,14 @@ struct rk3399_sdram_params params = {
0x00009fdb, /* DENALI_PHY_654_DATA */ 0x00009fdb, /* DENALI_PHY_654_DATA */
0x00008eca, /* DENALI_PHY_655_DATA */ 0x00008eca, /* DENALI_PHY_655_DATA */
0x01009fdb, /* DENALI_PHY_656_DATA */ 0x01009fdb, /* DENALI_PHY_656_DATA */
0x00020103, /* DENALI_PHY_657_DATA */ 0x02020003, /* DENALI_PHY_657_DATA */
0x00000000, /* DENALI_PHY_658_DATA */ 0x00000000, /* DENALI_PHY_658_DATA */
0x00000000, /* DENALI_PHY_659_DATA */ 0x00000000, /* DENALI_PHY_659_DATA */
0x00000000, /* DENALI_PHY_660_DATA */ 0x00000000, /* DENALI_PHY_660_DATA */
0x000556aa, /* DENALI_PHY_661_DATA */ 0x000fffff, /* DENALI_PHY_661_DATA */
0x000aaaaa, /* DENALI_PHY_662_DATA */ 0x00000000, /* DENALI_PHY_662_DATA */
0x000fffff, /* DENALI_PHY_663_DATA */ 0x000556aa, /* DENALI_PHY_663_DATA */
0x00000000, /* DENALI_PHY_664_DATA */ 0x000aaaaa, /* DENALI_PHY_664_DATA */
0x000b3133, /* DENALI_PHY_665_DATA */ 0x000b3133, /* DENALI_PHY_665_DATA */
0x0004cd33, /* DENALI_PHY_666_DATA */ 0x0004cd33, /* DENALI_PHY_666_DATA */
0x0004cecc, /* DENALI_PHY_667_DATA */ 0x0004cecc, /* DENALI_PHY_667_DATA */
@ -1387,14 +1387,14 @@ struct rk3399_sdram_params params = {
0x00009fdb, /* DENALI_PHY_782_DATA */ 0x00009fdb, /* DENALI_PHY_782_DATA */
0x00008eca, /* DENALI_PHY_783_DATA */ 0x00008eca, /* DENALI_PHY_783_DATA */
0x01009fdb, /* DENALI_PHY_784_DATA */ 0x01009fdb, /* DENALI_PHY_784_DATA */
0x00020103, /* DENALI_PHY_785_DATA */ 0x02020003, /* DENALI_PHY_785_DATA */
0x00000000, /* DENALI_PHY_786_DATA */ 0x00000000, /* DENALI_PHY_786_DATA */
0x00000000, /* DENALI_PHY_787_DATA */ 0x00000000, /* DENALI_PHY_787_DATA */
0x00000000, /* DENALI_PHY_788_DATA */ 0x00000000, /* DENALI_PHY_788_DATA */
0x000556aa, /* DENALI_PHY_789_DATA */ 0x000fffff, /* DENALI_PHY_789_DATA */
0x000aaaaa, /* DENALI_PHY_790_DATA */ 0x00000000, /* DENALI_PHY_790_DATA */
0x000fffff, /* DENALI_PHY_791_DATA */ 0x000556aa, /* DENALI_PHY_791_DATA */
0x00000000, /* DENALI_PHY_792_DATA */ 0x000aaaaa, /* DENALI_PHY_792_DATA */
0x000b3133, /* DENALI_PHY_793_DATA */ 0x000b3133, /* DENALI_PHY_793_DATA */
0x0004cd33, /* DENALI_PHY_794_DATA */ 0x0004cd33, /* DENALI_PHY_794_DATA */
0x0004cecc, /* DENALI_PHY_795_DATA */ 0x0004cecc, /* DENALI_PHY_795_DATA */

View File

@ -318,10 +318,10 @@ struct rk3399_sdram_params params = {
0x00000000, /* DENALI_CTL_253_DATA */ 0x00000000, /* DENALI_CTL_253_DATA */
0x00000000, /* DENALI_CTL_254_DATA */ 0x00000000, /* DENALI_CTL_254_DATA */
0x00000000, /* DENALI_CTL_255_DATA */ 0x00000000, /* DENALI_CTL_255_DATA */
0x000556aa, /* DENALI_CTL_256_DATA */ 0x000fffff, /* DENALI_CTL_256_DATA */
0x000aaaaa, /* DENALI_CTL_257_DATA */ 0x00000000, /* DENALI_CTL_257_DATA */
0x000fffff, /* DENALI_CTL_258_DATA */ 0x000556aa, /* DENALI_CTL_258_DATA */
0x00000000, /* DENALI_CTL_259_DATA */ 0x000aaaaa, /* DENALI_CTL_259_DATA */
0x000b3133, /* DENALI_CTL_260_DATA */ 0x000b3133, /* DENALI_CTL_260_DATA */
0x0004cd33, /* DENALI_CTL_261_DATA */ 0x0004cd33, /* DENALI_CTL_261_DATA */
0x0004cecc, /* DENALI_CTL_262_DATA */ 0x0004cecc, /* DENALI_CTL_262_DATA */
@ -1131,14 +1131,14 @@ struct rk3399_sdram_params params = {
0x00917531, /* DENALI_PHY_526_DATA */ 0x00917531, /* DENALI_PHY_526_DATA */
0x00806420, /* DENALI_PHY_527_DATA */ 0x00806420, /* DENALI_PHY_527_DATA */
0x01917531, /* DENALI_PHY_528_DATA */ 0x01917531, /* DENALI_PHY_528_DATA */
0x00020103, /* DENALI_PHY_529_DATA */ 0x02020003, /* DENALI_PHY_529_DATA */
0x00000000, /* DENALI_PHY_530_DATA */ 0x00000000, /* DENALI_PHY_530_DATA */
0x00000000, /* DENALI_PHY_531_DATA */ 0x00000000, /* DENALI_PHY_531_DATA */
0x00000000, /* DENALI_PHY_532_DATA */ 0x00000000, /* DENALI_PHY_532_DATA */
0x000556aa, /* DENALI_PHY_533_DATA */ 0x000fffff, /* DENALI_PHY_533_DATA */
0x000aaaaa, /* DENALI_PHY_534_DATA */ 0x00000000, /* DENALI_PHY_534_DATA */
0x000fffff, /* DENALI_PHY_535_DATA */ 0x000556aa, /* DENALI_PHY_535_DATA */
0x00000000, /* DENALI_PHY_536_DATA */ 0x000aaaaa, /* DENALI_PHY_536_DATA */
0x000b3133, /* DENALI_PHY_537_DATA */ 0x000b3133, /* DENALI_PHY_537_DATA */
0x0004cd33, /* DENALI_PHY_538_DATA */ 0x0004cd33, /* DENALI_PHY_538_DATA */
0x0004cecc, /* DENALI_PHY_539_DATA */ 0x0004cecc, /* DENALI_PHY_539_DATA */
@ -1259,14 +1259,14 @@ struct rk3399_sdram_params params = {
0x00009fdb, /* DENALI_PHY_654_DATA */ 0x00009fdb, /* DENALI_PHY_654_DATA */
0x00008eca, /* DENALI_PHY_655_DATA */ 0x00008eca, /* DENALI_PHY_655_DATA */
0x01009fdb, /* DENALI_PHY_656_DATA */ 0x01009fdb, /* DENALI_PHY_656_DATA */
0x00020103, /* DENALI_PHY_657_DATA */ 0x02020003, /* DENALI_PHY_657_DATA */
0x00000000, /* DENALI_PHY_658_DATA */ 0x00000000, /* DENALI_PHY_658_DATA */
0x00000000, /* DENALI_PHY_659_DATA */ 0x00000000, /* DENALI_PHY_659_DATA */
0x00000000, /* DENALI_PHY_660_DATA */ 0x00000000, /* DENALI_PHY_660_DATA */
0x000556aa, /* DENALI_PHY_661_DATA */ 0x000fffff, /* DENALI_PHY_661_DATA */
0x000aaaaa, /* DENALI_PHY_662_DATA */ 0x00000000, /* DENALI_PHY_662_DATA */
0x000fffff, /* DENALI_PHY_663_DATA */ 0x000556aa, /* DENALI_PHY_663_DATA */
0x00000000, /* DENALI_PHY_664_DATA */ 0x000aaaaa, /* DENALI_PHY_664_DATA */
0x000b3133, /* DENALI_PHY_665_DATA */ 0x000b3133, /* DENALI_PHY_665_DATA */
0x0004cd33, /* DENALI_PHY_666_DATA */ 0x0004cd33, /* DENALI_PHY_666_DATA */
0x0004cecc, /* DENALI_PHY_667_DATA */ 0x0004cecc, /* DENALI_PHY_667_DATA */
@ -1387,14 +1387,14 @@ struct rk3399_sdram_params params = {
0x00009fdb, /* DENALI_PHY_782_DATA */ 0x00009fdb, /* DENALI_PHY_782_DATA */
0x00008eca, /* DENALI_PHY_783_DATA */ 0x00008eca, /* DENALI_PHY_783_DATA */
0x01009fdb, /* DENALI_PHY_784_DATA */ 0x01009fdb, /* DENALI_PHY_784_DATA */
0x00020103, /* DENALI_PHY_785_DATA */ 0x02020003, /* DENALI_PHY_785_DATA */
0x00000000, /* DENALI_PHY_786_DATA */ 0x00000000, /* DENALI_PHY_786_DATA */
0x00000000, /* DENALI_PHY_787_DATA */ 0x00000000, /* DENALI_PHY_787_DATA */
0x00000000, /* DENALI_PHY_788_DATA */ 0x00000000, /* DENALI_PHY_788_DATA */
0x000556aa, /* DENALI_PHY_789_DATA */ 0x000fffff, /* DENALI_PHY_789_DATA */
0x000aaaaa, /* DENALI_PHY_790_DATA */ 0x00000000, /* DENALI_PHY_790_DATA */
0x000fffff, /* DENALI_PHY_791_DATA */ 0x000556aa, /* DENALI_PHY_791_DATA */
0x00000000, /* DENALI_PHY_792_DATA */ 0x000aaaaa, /* DENALI_PHY_792_DATA */
0x000b3133, /* DENALI_PHY_793_DATA */ 0x000b3133, /* DENALI_PHY_793_DATA */
0x0004cd33, /* DENALI_PHY_794_DATA */ 0x0004cd33, /* DENALI_PHY_794_DATA */
0x0004cecc, /* DENALI_PHY_795_DATA */ 0x0004cecc, /* DENALI_PHY_795_DATA */

View File

@ -58,7 +58,7 @@ struct rk3399_sdram_params params = {
.ddr_freq = 933*MHz, .ddr_freq = 933*MHz,
.dramtype = LPDDR3, .dramtype = LPDDR3,
.num_channels = 2, .num_channels = 2,
.stride = 13, .stride = 9,
.odt = 1, .odt = 1,
{ {
{ {
@ -318,10 +318,10 @@ struct rk3399_sdram_params params = {
0x00000000, /* DENALI_CTL_253_DATA */ 0x00000000, /* DENALI_CTL_253_DATA */
0x00000000, /* DENALI_CTL_254_DATA */ 0x00000000, /* DENALI_CTL_254_DATA */
0x00000000, /* DENALI_CTL_255_DATA */ 0x00000000, /* DENALI_CTL_255_DATA */
0x000556aa, /* DENALI_CTL_256_DATA */ 0x000fffff, /* DENALI_CTL_256_DATA */
0x000aaaaa, /* DENALI_CTL_257_DATA */ 0x00000000, /* DENALI_CTL_257_DATA */
0x000fffff, /* DENALI_CTL_258_DATA */ 0x000556aa, /* DENALI_CTL_258_DATA */
0x00000000, /* DENALI_CTL_259_DATA */ 0x000aaaaa, /* DENALI_CTL_259_DATA */
0x000b3133, /* DENALI_CTL_260_DATA */ 0x000b3133, /* DENALI_CTL_260_DATA */
0x0004cd33, /* DENALI_CTL_261_DATA */ 0x0004cd33, /* DENALI_CTL_261_DATA */
0x0004cecc, /* DENALI_CTL_262_DATA */ 0x0004cecc, /* DENALI_CTL_262_DATA */
@ -1131,14 +1131,14 @@ struct rk3399_sdram_params params = {
0x00917531, /* DENALI_PHY_526_DATA */ 0x00917531, /* DENALI_PHY_526_DATA */
0x00806420, /* DENALI_PHY_527_DATA */ 0x00806420, /* DENALI_PHY_527_DATA */
0x01917531, /* DENALI_PHY_528_DATA */ 0x01917531, /* DENALI_PHY_528_DATA */
0x00020103, /* DENALI_PHY_529_DATA */ 0x02020003, /* DENALI_PHY_529_DATA */
0x00000000, /* DENALI_PHY_530_DATA */ 0x00000000, /* DENALI_PHY_530_DATA */
0x00000000, /* DENALI_PHY_531_DATA */ 0x00000000, /* DENALI_PHY_531_DATA */
0x00000000, /* DENALI_PHY_532_DATA */ 0x00000000, /* DENALI_PHY_532_DATA */
0x000556aa, /* DENALI_PHY_533_DATA */ 0x000fffff, /* DENALI_PHY_533_DATA */
0x000aaaaa, /* DENALI_PHY_534_DATA */ 0x00000000, /* DENALI_PHY_534_DATA */
0x000fffff, /* DENALI_PHY_535_DATA */ 0x000556aa, /* DENALI_PHY_535_DATA */
0x00000000, /* DENALI_PHY_536_DATA */ 0x000aaaaa, /* DENALI_PHY_536_DATA */
0x000b3133, /* DENALI_PHY_537_DATA */ 0x000b3133, /* DENALI_PHY_537_DATA */
0x0004cd33, /* DENALI_PHY_538_DATA */ 0x0004cd33, /* DENALI_PHY_538_DATA */
0x0004cecc, /* DENALI_PHY_539_DATA */ 0x0004cecc, /* DENALI_PHY_539_DATA */
@ -1259,14 +1259,14 @@ struct rk3399_sdram_params params = {
0x00009fdb, /* DENALI_PHY_654_DATA */ 0x00009fdb, /* DENALI_PHY_654_DATA */
0x00008eca, /* DENALI_PHY_655_DATA */ 0x00008eca, /* DENALI_PHY_655_DATA */
0x01009fdb, /* DENALI_PHY_656_DATA */ 0x01009fdb, /* DENALI_PHY_656_DATA */
0x00020103, /* DENALI_PHY_657_DATA */ 0x02020003, /* DENALI_PHY_657_DATA */
0x00000000, /* DENALI_PHY_658_DATA */ 0x00000000, /* DENALI_PHY_658_DATA */
0x00000000, /* DENALI_PHY_659_DATA */ 0x00000000, /* DENALI_PHY_659_DATA */
0x00000000, /* DENALI_PHY_660_DATA */ 0x00000000, /* DENALI_PHY_660_DATA */
0x000556aa, /* DENALI_PHY_661_DATA */ 0x000fffff, /* DENALI_PHY_661_DATA */
0x000aaaaa, /* DENALI_PHY_662_DATA */ 0x00000000, /* DENALI_PHY_662_DATA */
0x000fffff, /* DENALI_PHY_663_DATA */ 0x000556aa, /* DENALI_PHY_663_DATA */
0x00000000, /* DENALI_PHY_664_DATA */ 0x000aaaaa, /* DENALI_PHY_664_DATA */
0x000b3133, /* DENALI_PHY_665_DATA */ 0x000b3133, /* DENALI_PHY_665_DATA */
0x0004cd33, /* DENALI_PHY_666_DATA */ 0x0004cd33, /* DENALI_PHY_666_DATA */
0x0004cecc, /* DENALI_PHY_667_DATA */ 0x0004cecc, /* DENALI_PHY_667_DATA */
@ -1387,14 +1387,14 @@ struct rk3399_sdram_params params = {
0x00009fdb, /* DENALI_PHY_782_DATA */ 0x00009fdb, /* DENALI_PHY_782_DATA */
0x00008eca, /* DENALI_PHY_783_DATA */ 0x00008eca, /* DENALI_PHY_783_DATA */
0x01009fdb, /* DENALI_PHY_784_DATA */ 0x01009fdb, /* DENALI_PHY_784_DATA */
0x00020103, /* DENALI_PHY_785_DATA */ 0x02020003, /* DENALI_PHY_785_DATA */
0x00000000, /* DENALI_PHY_786_DATA */ 0x00000000, /* DENALI_PHY_786_DATA */
0x00000000, /* DENALI_PHY_787_DATA */ 0x00000000, /* DENALI_PHY_787_DATA */
0x00000000, /* DENALI_PHY_788_DATA */ 0x00000000, /* DENALI_PHY_788_DATA */
0x000556aa, /* DENALI_PHY_789_DATA */ 0x000fffff, /* DENALI_PHY_789_DATA */
0x000aaaaa, /* DENALI_PHY_790_DATA */ 0x00000000, /* DENALI_PHY_790_DATA */
0x000fffff, /* DENALI_PHY_791_DATA */ 0x000556aa, /* DENALI_PHY_791_DATA */
0x00000000, /* DENALI_PHY_792_DATA */ 0x000aaaaa, /* DENALI_PHY_792_DATA */
0x000b3133, /* DENALI_PHY_793_DATA */ 0x000b3133, /* DENALI_PHY_793_DATA */
0x0004cd33, /* DENALI_PHY_794_DATA */ 0x0004cd33, /* DENALI_PHY_794_DATA */
0x0004cecc, /* DENALI_PHY_795_DATA */ 0x0004cecc, /* DENALI_PHY_795_DATA */

View File

@ -318,10 +318,10 @@ struct rk3399_sdram_params params = {
0x00000000, /* DENALI_CTL_253_DATA */ 0x00000000, /* DENALI_CTL_253_DATA */
0x00000000, /* DENALI_CTL_254_DATA */ 0x00000000, /* DENALI_CTL_254_DATA */
0x00000000, /* DENALI_CTL_255_DATA */ 0x00000000, /* DENALI_CTL_255_DATA */
0x000556aa, /* DENALI_CTL_256_DATA */ 0x000fffff, /* DENALI_CTL_256_DATA */
0x000aaaaa, /* DENALI_CTL_257_DATA */ 0x00000000, /* DENALI_CTL_257_DATA */
0x000fffff, /* DENALI_CTL_258_DATA */ 0x000556aa, /* DENALI_CTL_258_DATA */
0x00000000, /* DENALI_CTL_259_DATA */ 0x000aaaaa, /* DENALI_CTL_259_DATA */
0x000b3133, /* DENALI_CTL_260_DATA */ 0x000b3133, /* DENALI_CTL_260_DATA */
0x0004cd33, /* DENALI_CTL_261_DATA */ 0x0004cd33, /* DENALI_CTL_261_DATA */
0x0004cecc, /* DENALI_CTL_262_DATA */ 0x0004cecc, /* DENALI_CTL_262_DATA */
@ -1131,14 +1131,14 @@ struct rk3399_sdram_params params = {
0x00917531, /* DENALI_PHY_526_DATA */ 0x00917531, /* DENALI_PHY_526_DATA */
0x00806420, /* DENALI_PHY_527_DATA */ 0x00806420, /* DENALI_PHY_527_DATA */
0x01917531, /* DENALI_PHY_528_DATA */ 0x01917531, /* DENALI_PHY_528_DATA */
0x00020103, /* DENALI_PHY_529_DATA */ 0x02020003, /* DENALI_PHY_529_DATA */
0x00000000, /* DENALI_PHY_530_DATA */ 0x00000000, /* DENALI_PHY_530_DATA */
0x00000000, /* DENALI_PHY_531_DATA */ 0x00000000, /* DENALI_PHY_531_DATA */
0x00000000, /* DENALI_PHY_532_DATA */ 0x00000000, /* DENALI_PHY_532_DATA */
0x000556aa, /* DENALI_PHY_533_DATA */ 0x000fffff, /* DENALI_PHY_533_DATA */
0x000aaaaa, /* DENALI_PHY_534_DATA */ 0x00000000, /* DENALI_PHY_534_DATA */
0x000fffff, /* DENALI_PHY_535_DATA */ 0x000556aa, /* DENALI_PHY_535_DATA */
0x00000000, /* DENALI_PHY_536_DATA */ 0x000aaaaa, /* DENALI_PHY_536_DATA */
0x000b3133, /* DENALI_PHY_537_DATA */ 0x000b3133, /* DENALI_PHY_537_DATA */
0x0004cd33, /* DENALI_PHY_538_DATA */ 0x0004cd33, /* DENALI_PHY_538_DATA */
0x0004cecc, /* DENALI_PHY_539_DATA */ 0x0004cecc, /* DENALI_PHY_539_DATA */
@ -1259,14 +1259,14 @@ struct rk3399_sdram_params params = {
0x00009fdb, /* DENALI_PHY_654_DATA */ 0x00009fdb, /* DENALI_PHY_654_DATA */
0x00008eca, /* DENALI_PHY_655_DATA */ 0x00008eca, /* DENALI_PHY_655_DATA */
0x01009fdb, /* DENALI_PHY_656_DATA */ 0x01009fdb, /* DENALI_PHY_656_DATA */
0x00020103, /* DENALI_PHY_657_DATA */ 0x02020003, /* DENALI_PHY_657_DATA */
0x00000000, /* DENALI_PHY_658_DATA */ 0x00000000, /* DENALI_PHY_658_DATA */
0x00000000, /* DENALI_PHY_659_DATA */ 0x00000000, /* DENALI_PHY_659_DATA */
0x00000000, /* DENALI_PHY_660_DATA */ 0x00000000, /* DENALI_PHY_660_DATA */
0x000556aa, /* DENALI_PHY_661_DATA */ 0x000fffff, /* DENALI_PHY_661_DATA */
0x000aaaaa, /* DENALI_PHY_662_DATA */ 0x00000000, /* DENALI_PHY_662_DATA */
0x000fffff, /* DENALI_PHY_663_DATA */ 0x000556aa, /* DENALI_PHY_663_DATA */
0x00000000, /* DENALI_PHY_664_DATA */ 0x000aaaaa, /* DENALI_PHY_664_DATA */
0x000b3133, /* DENALI_PHY_665_DATA */ 0x000b3133, /* DENALI_PHY_665_DATA */
0x0004cd33, /* DENALI_PHY_666_DATA */ 0x0004cd33, /* DENALI_PHY_666_DATA */
0x0004cecc, /* DENALI_PHY_667_DATA */ 0x0004cecc, /* DENALI_PHY_667_DATA */
@ -1387,14 +1387,14 @@ struct rk3399_sdram_params params = {
0x00009fdb, /* DENALI_PHY_782_DATA */ 0x00009fdb, /* DENALI_PHY_782_DATA */
0x00008eca, /* DENALI_PHY_783_DATA */ 0x00008eca, /* DENALI_PHY_783_DATA */
0x01009fdb, /* DENALI_PHY_784_DATA */ 0x01009fdb, /* DENALI_PHY_784_DATA */
0x00020103, /* DENALI_PHY_785_DATA */ 0x02020003, /* DENALI_PHY_785_DATA */
0x00000000, /* DENALI_PHY_786_DATA */ 0x00000000, /* DENALI_PHY_786_DATA */
0x00000000, /* DENALI_PHY_787_DATA */ 0x00000000, /* DENALI_PHY_787_DATA */
0x00000000, /* DENALI_PHY_788_DATA */ 0x00000000, /* DENALI_PHY_788_DATA */
0x000556aa, /* DENALI_PHY_789_DATA */ 0x000fffff, /* DENALI_PHY_789_DATA */
0x000aaaaa, /* DENALI_PHY_790_DATA */ 0x00000000, /* DENALI_PHY_790_DATA */
0x000fffff, /* DENALI_PHY_791_DATA */ 0x000556aa, /* DENALI_PHY_791_DATA */
0x00000000, /* DENALI_PHY_792_DATA */ 0x000aaaaa, /* DENALI_PHY_792_DATA */
0x000b3133, /* DENALI_PHY_793_DATA */ 0x000b3133, /* DENALI_PHY_793_DATA */
0x0004cd33, /* DENALI_PHY_794_DATA */ 0x0004cd33, /* DENALI_PHY_794_DATA */
0x0004cecc, /* DENALI_PHY_795_DATA */ 0x0004cecc, /* DENALI_PHY_795_DATA */