mb/google/brask/var/aurash: Allow USB2/3 wakeups to (un)plug events in dt
BUG=b:271373437 BRANCH=none TEST=Verify USB-A device could wake up Aurash. Signed-off-by: Zoey Wu <zoey_wu@wistron.corp-partner.google.com> Change-Id: I67fc02d6c5660e0e3d1ab95bbda8ace1dc14b524 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73414 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -36,6 +36,15 @@ chip soc/intel/alderlake
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.tx_downscale_amp = 0x00,
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.tx_downscale_amp = 0x00,
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}" # Type-A port A2
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}" # Type-A port A2
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register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable TCP3
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register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable TCP3
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# Bitmap for Wake Enable on USB attach/detach
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register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(4) | \
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USB_PORT_WAKE_ENABLE(6) | \
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USB_PORT_WAKE_ENABLE(7) | \
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USB_PORT_WAKE_ENABLE(8)"
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register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \
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USB_PORT_WAKE_ENABLE(2) | \
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USB_PORT_WAKE_ENABLE(3) | \
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USB_PORT_WAKE_ENABLE(4)"
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register "tcc_offset" = "0" # TCC of 100C
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register "tcc_offset" = "0" # TCC of 100C
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register "power_limits_config[ADL_P_142_242_282_15W_CORE]" = "{
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register "power_limits_config[ADL_P_142_242_282_15W_CORE]" = "{
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.tdp_pl1_override = 15,
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.tdp_pl1_override = 15,
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