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sb/intel/bd82x6x: Use common early SPI code 

Change-Id: If4843e93c993ed2de60b2b6064c2c9e98637ce9a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42661
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-06-21 17:58:59 +02:00
parent fc7bc54e34
commit c9ee2c0323
1 changed files with 2 additions and 9 deletions
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11
src/southbridge/intel/bd82x6x/bootblock.c
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@ -2,16 +2,9 @@
#include <arch/bootblock.h>
#include <device/pci_ops.h>
#include <southbridge/intel/common/early_spi.h>
#include "pch.h"
/*
* Enable Prefetching and Caching.
*/
static void enable_spi_prefetch(void)
{
pci_update_config8(PCH_LPC_DEV, BIOS_CNTL, ~(3 << 2), 2 << 2);
}
static void enable_port80_on_lpc(void)
{
/* Enable port 80 POST on LPC */
@ -40,7 +33,7 @@ static void set_spi_speed(void)
void bootblock_early_southbridge_init(void)
{
enable_spi_prefetch();
enable_spi_prefetching_and_caching();
early_pch_init();