nb/intel/x4x: Rework nb resource reading
- Use newer functions and avoid the * / KiB dance - Use existing functions for figuring out TSEG and UMA Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I5c6dcbc8ed79b79ee097c7a14fe14ed87af33c2b Reviewed-on: https://review.coreboot.org/c/coreboot/+/76275 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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@ -13,15 +13,14 @@
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#include <northbridge/intel/x4x/x4x.h>
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#include <northbridge/intel/x4x/x4x.h>
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#include <cpu/intel/smm_reloc.h>
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#include <cpu/intel/smm_reloc.h>
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#include <cpu/intel/speedstep.h>
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#include <cpu/intel/speedstep.h>
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#include <cpu/x86/smm.h>
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static void mch_domain_read_resources(struct device *dev)
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static void mch_domain_read_resources(struct device *dev)
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{
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{
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u8 index;
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u8 index;
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u64 tom, touud;
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u64 tom, touud;
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u32 tomk, tolud, delta_cbmem;
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u32 tolud;
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u32 uma_sizek = 0;
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const u32 top32memk = 4 * (GiB / KiB);
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index = 3;
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index = 3;
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pci_domain_read_resources(dev);
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pci_domain_read_resources(dev);
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@ -42,48 +41,11 @@ static void mch_domain_read_resources(struct device *dev)
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printk(BIOS_DEBUG, "TOUUD 0x%llx TOLUD 0x%08x TOM 0x%llx\n", touud, tolud, tom);
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printk(BIOS_DEBUG, "TOUUD 0x%llx TOLUD 0x%08x TOM 0x%llx\n", touud, tolud, tom);
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tomk = tolud >> 10;
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/* Graphics memory comes next */
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const u16 ggc = pci_read_config16(mch, D0F0_GGC);
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printk(BIOS_DEBUG, "IGD decoded, subtracting ");
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/* Graphics memory */
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const u32 gms_sizek = decode_igd_memory_size((ggc >> 4) & 0xf);
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printk(BIOS_DEBUG, "%uM UMA", gms_sizek >> 10);
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tomk -= gms_sizek;
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uma_sizek += gms_sizek;
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/* GTT Graphics Stolen Memory Size (GGMS) */
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const u32 gsm_sizek = decode_igd_gtt_size((ggc >> 8) & 0xf);
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printk(BIOS_DEBUG, " and %uM GTT\n", gsm_sizek >> 10);
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tomk -= gsm_sizek;
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uma_sizek += gsm_sizek;
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printk(BIOS_DEBUG, "TSEG decoded, subtracting ");
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const u32 tseg_sizek = decode_tseg_size(
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pci_read_config8(dev, D0F0_ESMRAMC)) >> 10;
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uma_sizek += tseg_sizek;
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tomk -= tseg_sizek;
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printk(BIOS_DEBUG, "%dM\n", tseg_sizek >> 10);
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/* cbmem_top can be shifted downwards due to alignment.
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Mark the region between cbmem_top and tomk as unusable */
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delta_cbmem = tomk - ((uintptr_t)cbmem_top() >> 10);
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tomk -= delta_cbmem;
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uma_sizek += delta_cbmem;
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printk(BIOS_DEBUG, "Unused RAM between cbmem_top and TOM: 0x%xK\n", delta_cbmem);
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printk(BIOS_INFO, "Available memory below 4GB: %uM\n", tomk >> 10);
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/* Report the memory regions */
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/* Report the memory regions */
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ram_from_to(dev, index++, 0, 0xa0000);
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ram_from_to(dev, index++, 0, 0xa0000);
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mmio_from_to(dev, index++, 0xa0000, 0xc0000);
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mmio_from_to(dev, index++, 0xa0000, 0xc0000);
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reserved_ram_from_to(dev, index++, 0xc0000, 1 * MiB);
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reserved_ram_from_to(dev, index++, 0xc0000, 1 * MiB);
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ram_resource_kb(dev, index++, 0x100000 >> 10, (tomk - (0x100000 >> 10)));
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ram_from_to(dev, index++, 1 * MiB, (uintptr_t)cbmem_top());
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/*
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/*
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* If >= 4GB installed then memory from TOLUD to 4GB
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* If >= 4GB installed then memory from TOLUD to 4GB
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@ -91,14 +53,14 @@ static void mch_domain_read_resources(struct device *dev)
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*/
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*/
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upper_ram_end(dev, index++, touud);
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upper_ram_end(dev, index++, touud);
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printk(BIOS_DEBUG, "Adding UMA memory area base=0x%08x size=0x%08x\n",
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uintptr_t tseg_base;
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tomk << 10, uma_sizek << 10);
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size_t tseg_size;
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uma_resource_kb(dev, index++, tomk, uma_sizek);
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smm_region(&tseg_base, &tseg_size);
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mmio_from_to(dev, index++, tseg_base, tolud);
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reserved_ram_from_to(dev, index++, (uintptr_t)cbmem_top(), tseg_base);
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/* Reserve high memory where the NB BARs are up to 4GiB */
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/* Reserve high memory where the NB BARs are up to 4GiB */
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fixed_mem_resource_kb(dev, index++, DEFAULT_HECIBAR >> 10,
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mmio_from_to(dev, index++, DEFAULT_HECIBAR, 4ull * GiB);
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top32memk - (DEFAULT_HECIBAR >> 10),
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IORESOURCE_RESERVE);
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mmconf_resource(dev, index++);
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mmconf_resource(dev, index++);
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}
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}
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