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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdint.h>
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#include <arch/cpu.h>
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#include <console/console.h>
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#include <device/device.h>
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#include "w83793.h"
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#include <device/smbus.h>
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#include "chip.h"
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static int w83793_fan_limit(device_t dev, int fan, uint16_t limit)
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{
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return smbus_write_byte(dev, 0x90 + fan * 2, limit >> 8) ||
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smbus_write_byte(dev, 0x91 + fan * 2, limit & 0xff);
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}
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static int w83793_bank(device_t dev, int bank)
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{
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return smbus_write_byte(dev, 0, bank);
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}
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static int w83793_td_level(device_t dev, int fan, const char *level)
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{
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fan *= 0x10;
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smbus_write_byte(dev, 0x30 + fan, level[0]);
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smbus_write_byte(dev, 0x31 + fan, level[1]);
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smbus_write_byte(dev, 0x32 + fan, level[2]);
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smbus_write_byte(dev, 0x33 + fan, level[3]);
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smbus_write_byte(dev, 0x34 + fan, level[4]);
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smbus_write_byte(dev, 0x35 + fan, level[5]);
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smbus_write_byte(dev, 0x36 + fan, level[6]);
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return 0;
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}
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static int w83793_tr_level(device_t dev, int fan, const char *level)
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{
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fan *= 0x10;
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smbus_write_byte(dev, 0x70 + fan, level[0]);
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smbus_write_byte(dev, 0x71 + fan, level[1]);
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smbus_write_byte(dev, 0x72 + fan, level[2]);
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smbus_write_byte(dev, 0x73 + fan, level[3]);
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smbus_write_byte(dev, 0x74 + fan, level[4]);
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smbus_write_byte(dev, 0x75 + fan, level[5]);
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smbus_write_byte(dev, 0x76 + fan, level[6]);
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return 0;
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}
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static int w83793_td_fan_level(device_t dev, int fan, const char *level)
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{
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fan *= 0x10;
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smbus_write_byte(dev, 0x38 + fan, level[0]);
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smbus_write_byte(dev, 0x39 + fan, level[1]);
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smbus_write_byte(dev, 0x3a + fan, level[2]);
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smbus_write_byte(dev, 0x3b + fan, level[3]);
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smbus_write_byte(dev, 0x3c + fan, level[4]);
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smbus_write_byte(dev, 0x3d + fan, level[5]);
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smbus_write_byte(dev, 0x3e + fan, level[6]);
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return 0;
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}
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static int w83793_tr_fan_level(device_t dev, int fan, const char *level)
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{
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fan *= 0x10;
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smbus_write_byte(dev, 0x78 + fan, level[0]);
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smbus_write_byte(dev, 0x79 + fan, level[1]);
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smbus_write_byte(dev, 0x7a + fan, level[2]);
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smbus_write_byte(dev, 0x7b + fan, level[3]);
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smbus_write_byte(dev, 0x7c + fan, level[4]);
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smbus_write_byte(dev, 0x7d + fan, level[5]);
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smbus_write_byte(dev, 0x7e + fan, level[6]);
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return 0;
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}
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static void w83793_init(device_t dev)
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{
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struct drivers_i2c_w83793_config *config = dev->chip_info;
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uint16_t id;
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int i;
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if (w83793_bank(dev, 0))
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printk(BIOS_ERR, "%s: failed\n", __func__);
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if (!config)
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return;
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id = smbus_read_byte(dev, 0x0d);
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w83793_bank(dev, 0x80);
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id |= smbus_read_byte(dev, 0x0d) << 8;
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printk(BIOS_ERR, "ID: %04x\n", id);
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/* reset configuration */
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smbus_write_byte(dev, 0x40, 0x80);
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smbus_write_byte(dev, 0x51, 0x06);
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/* Multi function control */
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smbus_write_byte(dev, 0x58, config->mfc);
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/* FANIN_Ctrl */
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smbus_write_byte(dev, 0x5c, config->fanin);
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/* Temperature reported by PECI */
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smbus_write_byte(dev, 0x5e, 0xff);
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/* TR monitor enable */
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smbus_write_byte(dev, 0x5f, config->tr_enable);
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/* PECI Agent configuration */
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smbus_write_byte(dev, 0xd0, config->peci_agent_conf);
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/* TCase */
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smbus_write_byte(dev, 0xd1, config->tcase0);
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smbus_write_byte(dev, 0xd2, config->tcase1);
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smbus_write_byte(dev, 0xd3, config->tcase2);
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smbus_write_byte(dev, 0xd4, config->tcase3);
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/* PECI Reportstyle */
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smbus_write_byte(dev, 0xd5, 0x00);
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for (i = 0; i < 9; i++)
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w83793_fan_limit(dev, i, 0x768);
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/* Fan output style control */
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smbus_write_byte(dev, 0xb0, 0x00);
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smbus_write_byte(dev, 0xb1, 0x00);
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/* FAN Uptime */
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smbus_write_byte(dev, 0xc3, 0x02);
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/* FAN downtime */
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smbus_write_byte(dev, 0xc4, 0x03);
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/* ALL FAN critical temperature */
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smbus_write_byte(dev, 0xc5, config->critical_temperature);
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/* Temperature offset */
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smbus_write_byte(dev, 0xa8, 0xf9);
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smbus_write_byte(dev, 0xa9, 0xf9);
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smbus_write_byte(dev, 0xaa, 0xf9);
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smbus_write_byte(dev, 0xab, 0xf9);
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/* BANK 2 */
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smbus_write_byte(dev, 0x00, 0x02);
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/* TD FAN select */
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smbus_write_byte(dev, 0x01, config->td1_fan_select);
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smbus_write_byte(dev, 0x02, config->td2_fan_select);
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smbus_write_byte(dev, 0x03, config->td3_fan_select);
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smbus_write_byte(dev, 0x04, config->td4_fan_select);
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smbus_write_byte(dev, 0x05, config->tr1_fan_select);
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smbus_write_byte(dev, 0x06, config->tr2_fan_select);
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/* FAN control mode */
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smbus_write_byte(dev, 0x07, 0x00);
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/* hysteresis tolerance */
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smbus_write_byte(dev, 0x08, 0xaa);
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smbus_write_byte(dev, 0x09, 0xaa);
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/* FanNonStop */
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smbus_write_byte(dev, 0x18, 0x1d);
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smbus_write_byte(dev, 0x19, 0x04);
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smbus_write_byte(dev, 0x1a, 0x04);
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smbus_write_byte(dev, 0x1b, 0x04);
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smbus_write_byte(dev, 0x1c, 0x04);
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smbus_write_byte(dev, 0x1d, 0x04);
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smbus_write_byte(dev, 0x1e, 0x04);
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smbus_write_byte(dev, 0x1f, 0x04);
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/* FanStart */
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smbus_write_byte(dev, 0x20, 0x08);
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smbus_write_byte(dev, 0x21, 0x08);
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smbus_write_byte(dev, 0x22, 0x08);
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smbus_write_byte(dev, 0x23, 0x08);
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smbus_write_byte(dev, 0x24, 0x08);
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smbus_write_byte(dev, 0x25, 0x08);
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smbus_write_byte(dev, 0x26, 0x08);
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smbus_write_byte(dev, 0x27, 0x08);
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for (i = 0; i < 4; i++)
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w83793_td_level(dev, i, (const char[]){ 0x32, 0x32, 0x32, 0x32, 0x37, 0x41, 0x4b });
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for (i = 0; i < 2; i++)
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w83793_tr_level(dev, i, (const char[]){ 0x1e, 0x23, 0x28, 0x2d, 0x32, 0x37, 0x3c });
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for (i = 0; i < 4; i++)
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w83793_td_fan_level(dev, i, (const char[]){ 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x26 });
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for (i = 0; i < 2; i++)
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w83793_tr_fan_level(dev, i, (const char[]){ 0x08, 0x0c, 0x10, 0x18, 0x20, 0x30, 0x38 });
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smbus_write_byte(dev, 0x00, 0x00);
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/* Fan output style */
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smbus_write_byte(dev, 0xb4, 0x00);
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smbus_write_byte(dev, 0xb5, 0x00);
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/* start monitoring operation */
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smbus_write_byte(dev, 0x40, 0x09);
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}
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static void w83793_noop(device_t dummy)
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{
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}
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static struct device_operations w83793_operations = {
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.read_resources = w83793_noop,
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.set_resources = w83793_noop,
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.enable_resources = w83793_noop,
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.init = w83793_init,
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};
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static void enable_dev(device_t dev)
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{
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dev->ops = &w83793_operations;
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}
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struct chip_operations drivers_i2c_w83793_ops = {
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CHIP_NAME("Nuvoton W83793 Hardware Monitor")
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.enable_dev = enable_dev,
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};
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