cpu/intel/haswell: Rename HASWELL_BCLK
to CPU_BCLK
This is just to ease merging with Broadwell. Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical. Change-Id: I9239489fe48f04714e6626b57ef07ca8b3013024 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46910 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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3 changed files with 4 additions and 4 deletions
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@ -209,7 +209,7 @@ static void generate_P_state_entries(int core, int cores_per_package)
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/* Max Non-Turbo Ratio */
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/* Max Non-Turbo Ratio */
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ratio_max = (msr.lo >> 8) & 0xff;
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ratio_max = (msr.lo >> 8) & 0xff;
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}
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}
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clock_max = ratio_max * HASWELL_BCLK;
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clock_max = ratio_max * CPU_BCLK;
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/* Calculate CPU TDP in mW */
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/* Calculate CPU TDP in mW */
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msr = rdmsr(MSR_PKG_POWER_SKU_UNIT);
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msr = rdmsr(MSR_PKG_POWER_SKU_UNIT);
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@ -273,7 +273,7 @@ static void generate_P_state_entries(int core, int cores_per_package)
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/* Calculate power at this ratio */
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/* Calculate power at this ratio */
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power = calculate_power(power_max, ratio_max, ratio);
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power = calculate_power(power_max, ratio_max, ratio);
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clock = ratio * HASWELL_BCLK;
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clock = ratio * CPU_BCLK;
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acpigen_write_PSS_package(
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acpigen_write_PSS_package(
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clock, /*MHz*/
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clock, /*MHz*/
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@ -18,7 +18,7 @@
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#define HASWELL_STEPPING_ULT_C0 1
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#define HASWELL_STEPPING_ULT_C0 1
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/* Haswell bus clock is fixed at 100MHz */
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/* Haswell bus clock is fixed at 100MHz */
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#define HASWELL_BCLK 100
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#define CPU_BCLK 100
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#define MSR_CORE_THREAD_COUNT 0x35
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#define MSR_CORE_THREAD_COUNT 0x35
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#define MSR_FEATURE_CONFIG 0x13c
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#define MSR_FEATURE_CONFIG 0x13c
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@ -596,7 +596,7 @@ static void set_max_ratio(void)
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wrmsr(IA32_PERF_CTL, perf_ctl);
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wrmsr(IA32_PERF_CTL, perf_ctl);
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printk(BIOS_DEBUG, "CPU: frequency set to %d\n",
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printk(BIOS_DEBUG, "CPU: frequency set to %d\n",
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((perf_ctl.lo >> 8) & 0xff) * HASWELL_BCLK);
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((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK);
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}
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}
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static void configure_mca(void)
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static void configure_mca(void)
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