soc/intel/broadwell: Move GPIO init to a common place

This also links the gpio configuration instead of including it as a
header.

Change-Id: I9309d2b842495f6cff33fdab18aa139a82c1959c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32759
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>

src/mainboard/google/auron/Makefile.inc

@@ -32,3 +32,5 @@ subdirs-y += variants/$(VARIANT_DIR)
 subdirs-y += variants/$(VARIANT_DIR)/spd
 
 CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
+
+romstage-y += variants/$(VARIANT_DIR)/gpio.c

src/mainboard/google/auron/romstage.c

@@ -17,11 +17,9 @@
 #include <console/console.h>
 #include <string.h>
 #include <ec/google/chromeec/ec.h>
-#include <soc/gpio.h>
 #include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
 #include <soc/romstage.h>
-#include <variant/gpio.h>
 #include <variant/spd.h>
 #include "variant.h"
 
@@ -35,9 +33,6 @@ void mainboard_romstage_entry(struct romstage_params *rp)
 
 	post_code(0x32);
 
-	/* Initialize GPIOs */
-	init_gpios(mainboard_gpio_config);
-
 	/* Fill out PEI DATA */
 	memset(&pei_data, 0, sizeof(pei_data));
 	mainboard_fill_pei_data(&pei_data);

src/mainboard/google/auron/variants/auron_paine/gpio.c

@@ -13,12 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef AURON_YUNA_GPIO_H
-#define AURON_YUNA_GPIO_H
-
 #include <soc/gpio.h>
 
-static const struct gpio_config mainboard_gpio_config[] = {
+const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 0: UNUSED */
 	PCH_GPIO_UNUSED,        /* 1: UNUSED */
 	PCH_GPIO_UNUSED,        /* 2: UNUSED */
@@ -116,5 +113,3 @@ static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 94: UNUSED */
 	PCH_GPIO_END
 };
-
-#endif

src/mainboard/google/auron/variants/auron_paine/spd/spd.c

@@ -22,7 +22,6 @@
 #include <soc/romstage.h>
 #include <ec/google/chromeec/ec.h>
 #include <mainboard/google/auron/ec.h>
-#include <variant/gpio.h>
 #include <variant/spd.h>
 
 static void mainboard_print_spd_info(uint8_t spd[])

src/mainboard/google/auron/variants/auron_yuna/gpio.c

@@ -13,12 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef AURON_PAINE_GPIO_H
-#define AURON_PAINE_GPIO_H
-
 #include <soc/gpio.h>
 
-static const struct gpio_config mainboard_gpio_config[] = {
+const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 0: UNUSED */
 	PCH_GPIO_UNUSED,        /* 1: UNUSED */
 	PCH_GPIO_UNUSED,        /* 2: UNUSED */
@@ -116,5 +113,3 @@ static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 94: UNUSED */
 	PCH_GPIO_END
 };
-
-#endif

src/mainboard/google/auron/variants/auron_yuna/spd/spd.c

@@ -22,7 +22,6 @@
 #include <soc/romstage.h>
 #include <ec/google/chromeec/ec.h>
 #include <mainboard/google/auron/ec.h>
-#include <variant/gpio.h>
 #include <variant/spd.h>
 
 static void mainboard_print_spd_info(uint8_t spd[])

src/mainboard/google/auron/variants/buddy/gpio.c

@@ -14,12 +14,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef BUDDY_GPIO_H
-#define BUDDY_GPIO_H
-
 #include <soc/gpio.h>
 
-static const struct gpio_config mainboard_gpio_config[] = {
+const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 0: UNUSED */
 	PCH_GPIO_UNUSED,        /* 1: UNUSED */
 	PCH_GPIO_UNUSED,        /* 2: UNUSED */
@@ -117,5 +114,3 @@ static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 94: UNUSED */
 	PCH_GPIO_END
 };
-
-#endif

src/mainboard/google/auron/variants/gandof/gpio.c

@@ -13,12 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef GANDOF_GPIO_H
-#define GANDOF_GPIO_H
-
 #include <soc/gpio.h>
 
-static const struct gpio_config mainboard_gpio_config[] = {
+const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 0: UNUSED */
 	PCH_GPIO_UNUSED,        /* 1: UNUSED */
 	PCH_GPIO_UNUSED,        /* 2: UNUSED */
@@ -116,5 +113,3 @@ static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 94: UNUSED */
 	PCH_GPIO_END
 };
-
-#endif

src/mainboard/google/auron/variants/gandof/spd/spd.c

@@ -22,7 +22,6 @@
 #include <soc/romstage.h>
 #include <ec/google/chromeec/ec.h>
 #include <mainboard/google/auron/ec.h>
-#include <variant/gpio.h>
 #include <variant/spd.h>
 
 static void mainboard_print_spd_info(uint8_t spd[])

src/mainboard/google/auron/variants/lulu/gpio.c

@@ -14,12 +14,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef LULU_GPIO_H
-#define LULU_GPIO_H
-
 #include <soc/gpio.h>
 
-static const struct gpio_config mainboard_gpio_config[] = {
+const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 0: UNUSED */
 	PCH_GPIO_UNUSED,        /* 1: UNUSED */
 	PCH_GPIO_UNUSED,        /* 2: UNUSED */
@@ -117,5 +114,3 @@ static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 94: UNUSED */
 	PCH_GPIO_END
 };
-
-#endif

src/mainboard/google/auron/variants/lulu/spd/spd.c

@@ -23,7 +23,6 @@
 #include <soc/romstage.h>
 #include <ec/google/chromeec/ec.h>
 #include <mainboard/google/auron/ec.h>
-#include <variant/gpio.h>
 #include <variant/spd.h>
 
 static void mainboard_print_spd_info(uint8_t spd[])

src/mainboard/google/auron/variants/samus/gpio.c

@@ -13,12 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef SAMUS_GPIO_H
-#define SAMUS_GPIO_H
-
 #include <soc/gpio.h>
 
-static const struct gpio_config mainboard_gpio_config[] = {
+const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 0: UNUSED */
 	PCH_GPIO_UNUSED,        /* 1: UNUSED */
 	PCH_GPIO_UNUSED,        /* 2: UNUSED */
@@ -116,5 +113,3 @@ static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 94: UNUSED */
 	PCH_GPIO_END
 };
-
-#endif

src/mainboard/google/auron/variants/samus/spd/spd.c

@@ -22,7 +22,6 @@
 #include <soc/romstage.h>
 #include <ec/google/chromeec/ec.h>
 #include <mainboard/google/auron/ec.h>
-#include <variant/gpio.h>
 #include <variant/spd.h>
 
 static void mainboard_print_spd_info(uint8_t spd[])

src/mainboard/google/jecht/Makefile.inc

@@ -27,3 +27,5 @@ romstage-y += led.c
 
 subdirs-y += variants/$(VARIANT_DIR)
 CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
+
+romstage-y += variants/$(VARIANT_DIR)/gpio.c

src/mainboard/google/jecht/romstage.c

@@ -18,14 +18,12 @@
 #include <console/console.h>
 #include <string.h>
 #include <ec/google/chromeec/ec.h>
-#include <soc/gpio.h>
 #include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
 #include <soc/romstage.h>
 #include <superio/ite/common/ite.h>
 #include <superio/ite/it8772f/it8772f.h>
 #include <mainboard/google/jecht/spd/spd.h>
-#include <variant/gpio.h>
 #include "onboard.h"
 
 
@@ -35,9 +33,6 @@ void mainboard_romstage_entry(struct romstage_params *rp)
 
 	post_code(0x32);
 
-	/* Initialize GPIOs */
-	init_gpios(mainboard_gpio_config);
-
 	/* Fill out PEI DATA */
 	memset(&pei_data, 0, sizeof(pei_data));
 	mainboard_fill_pei_data(&pei_data);

src/mainboard/google/jecht/variants/guado/gpio.c

@@ -13,12 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef GUADO_GPIO_H
-#define GUADO_GPIO_H
-
 #include <soc/gpio.h>
 
-static const struct gpio_config mainboard_gpio_config[] = {
+const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 0: UNUSED */
 	PCH_GPIO_UNUSED,        /* 1: UNUSED */
 	PCH_GPIO_UNUSED,        /* 2: UNUSED */
@@ -116,5 +113,3 @@ static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 94: UNUSED */
 	PCH_GPIO_END
 };
-
-#endif

src/mainboard/google/jecht/variants/jecht/gpio.c

@@ -13,12 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef JECHT_GPIO_H
-#define JECHT_GPIO_H
-
 #include <soc/gpio.h>
 
-static const struct gpio_config mainboard_gpio_config[] = {
+const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 0: UNUSED */
 	PCH_GPIO_UNUSED,        /* 1: UNUSED */
 	PCH_GPIO_UNUSED,        /* 2: UNUSED */
@@ -116,5 +113,3 @@ static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 94: UNUSED */
 	PCH_GPIO_END
 };
-
-#endif

src/mainboard/google/jecht/variants/rikku/gpio.c

@@ -13,12 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef RIKKU_GPIO_H
-#define RIKKU_GPIO_H
-
 #include <soc/gpio.h>
 
-static const struct gpio_config mainboard_gpio_config[] = {
+const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 0: UNUSED */
 	PCH_GPIO_UNUSED,        /* 1: UNUSED */
 	PCH_GPIO_UNUSED,        /* 2: UNUSED */
@@ -116,5 +113,3 @@ static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 94: UNUSED */
 	PCH_GPIO_END
 };
-
-#endif

src/mainboard/google/jecht/variants/tidus/gpio.c

@@ -13,12 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef TIDUS_GPIO_H
-#define TIDUS_GPIO_H
-
 #include <soc/gpio.h>
 
-static const struct gpio_config mainboard_gpio_config[] = {
+const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 0: UNUSED */
 	PCH_GPIO_UNUSED,        /* 1: UNUSED */
 	PCH_GPIO_UNUSED,        /* 2: UNUSED */
@@ -116,5 +113,3 @@ static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_UNUSED,        /* 94: UNUSED */
 	PCH_GPIO_END
 };
-
-#endif

src/mainboard/intel/wtm2/Makefile.inc

@@ -13,6 +13,8 @@
 ## GNU General Public License for more details.
 ##
 
+romstage-y += gpio.c
+
 romstage-y += chromeos.c
 ramstage-y += chromeos.c
 

src/mainboard/intel/wtm2/gpio.c

@@ -13,12 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef INTEL_WTM2_GPIO_H
-#define INTEL_WTM2_GPIO_H
-
 #include <soc/gpio.h>
 
-static const struct gpio_config mainboard_gpio_config[] = {
+const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_NATIVE,        /* 0: LPSS_UART1_RXD */
 	PCH_GPIO_NATIVE,        /* 1: LPSS_UART1_TXD */
 	PCH_GPIO_NATIVE,        /* 2: LPSS_UART1_RTS_N_R */
@@ -116,5 +113,3 @@ static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_NATIVE,        /* 94: LPSS_UART0_CTS_N */
 	PCH_GPIO_END
 };
-
-#endif

src/mainboard/intel/wtm2/romstage.c

@@ -21,7 +21,6 @@
 #include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
 #include <soc/romstage.h>
-#include "gpio.h"
 
 void mainboard_romstage_entry(struct romstage_params *rp)
 {
@@ -29,9 +28,6 @@ void mainboard_romstage_entry(struct romstage_params *rp)
 
 	post_code(0x32);
 
-	/* Initialize GPIOs */
-	init_gpios(mainboard_gpio_config);
-
 	/* Fill out PEI DATA */
 	memset(&pei_data, 0, sizeof(pei_data));
 	mainboard_fill_pei_data(&pei_data);

src/mainboard/purism/librem_bdw/Makefile.inc

@@ -13,5 +13,6 @@
 ## GNU General Public License for more details.
 ##
 
+romstage-y += gpio.c
 romstage-y += variants/$(VARIANT_DIR)/pei_data.c
 ramstage-y += variants/$(VARIANT_DIR)/pei_data.c

src/mainboard/purism/librem_bdw/gpio.c

@@ -13,12 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef MAINBOARD_GPIO_H
-#define MAINBOARD_GPIO_H
-
 #include <soc/gpio.h>
 
-static const struct gpio_config mainboard_gpio_config[] = {
+const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_INPUT,		/* 0 */
 	PCH_GPIO_INPUT,		/* 1 */
 	PCH_GPIO_INPUT,		/* 2 */
@@ -116,5 +113,3 @@ static const struct gpio_config mainboard_gpio_config[] = {
 	PCH_GPIO_INPUT,		/* 94 */
 	PCH_GPIO_END
 };
-
-#endif

src/mainboard/purism/librem_bdw/romstage.c

@@ -14,19 +14,14 @@
  */
 
 #include <string.h>
-#include <soc/gpio.h>
 #include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
 #include <soc/romstage.h>
-#include "gpio.h"
 
 void mainboard_romstage_entry(struct romstage_params *rp)
 {
 	struct pei_data pei_data;
 
-	/* Initialize GPIOs */
-	init_gpios(mainboard_gpio_config);
-
 	/* Fill out PEI DATA */
 	memset(&pei_data, 0, sizeof(pei_data));
 	mainboard_fill_pei_data(&pei_data);

src/soc/intel/broadwell/include/soc/gpio.h

@@ -193,4 +193,6 @@ int gpio_is_native(int gpio_num);
  */
 unsigned int get_gpios(const int *gpio_num_array);
 
+extern const struct gpio_config mainboard_gpio_config[];
+
 #endif

src/soc/intel/broadwell/romstage/romstage.c

@@ -27,6 +27,7 @@
 #include <romstage_handoff.h>
 #include <stage_cache.h>
 #include <timestamp.h>
+#include <soc/gpio.h>
 #include <soc/me.h>
 #include <soc/pei_data.h>
 #include <soc/pm.h>
@@ -100,6 +101,9 @@ static void romstage_main(uint64_t tsc, uint32_t bist)
 	/* Set CPU frequency to maximum */
 	set_max_freq();
 
+	/* Initialize GPIOs */
+	init_gpios(mainboard_gpio_config);
+
 	/* Call into mainboard. */
 	mainboard_romstage_entry(&rp);