Fix reading HT link offsets.
pci_read_config32 overwrites the real value, use another variable for that. Signed-off-by: Maximilian Thuermer <maximilian.thuermer@ziti.uni-heidelberg.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5277 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -702,25 +702,27 @@ void AMD_SetupPSIVID_d (u32 platform_type, u8 node)
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*/
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*/
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BOOL AMD_CpuFindCapability (u8 node, u8 cap_count, u8 *offset)
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BOOL AMD_CpuFindCapability (u8 node, u8 cap_count, u8 *offset)
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{
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{
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u32 reg;
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u32 val;
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u32 val;
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/* get start of CPU HT Host Capabilities */
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/* get start of CPU HT Host Capabilities */
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val = pci_read_config32(NODE_PCI(node, 0), 0x34);
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val = pci_read_config32(NODE_PCI(node, 0), 0x34);
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val &= 0xFF;
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val &= 0xFF; //reg offset of first link
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cap_count++;
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cap_count++;
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/* Traverse through the capabilities. */
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/* Traverse through the capabilities. */
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do {
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do {
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val = pci_read_config32(NODE_PCI(node, 0), val);
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reg = pci_read_config32(NODE_PCI(node, 0), val);
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/* Is the capability block a HyperTransport capability block? */
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/* Is the capability block a HyperTransport capability block? */
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if ((val & 0xFF) == 0x08) {
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if ((reg & 0xFF) == 0x08) {
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/* Is the HT capability block an HT Host Capability? */
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/* Is the HT capability block an HT Host Capability? */
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if ((val & 0xE0000000) == (1 << 29))
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if ((reg & 0xE0000000) == (1 << 29))
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cap_count--;
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cap_count--;
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}
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}
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if (cap_count)
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val = (val >> 8) & 0xFF;
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if(cap_count)
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val = (reg >> 8) & 0xFF; //update reg offset
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} while (cap_count && val);
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} while (cap_count && val);
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*offset = (u8) val;
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*offset = (u8) val;
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