soc/cavium: Remove white spaces before tabs
Change-Id: I8213835ac18a31f1c10d80ba07b50d33f8abcbd9 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/30620 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
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@ -37,9 +37,9 @@ union bit_cfg {
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u64 filt_cnt : 4; /* Glitch filter counter */
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u64 filt_sel : 4; /* Glitch filter select */
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u64 tx_od : 1; /* Set Output to Open Drain */
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u64 : 3;
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u64 : 3;
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u64 pin_sel : 10; /* Select type of pin */
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u64 : 38;
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u64 : 38;
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} s;
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};
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@ -36,7 +36,7 @@
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/* LMC */
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#define LMC0_PF_BAR0 0x87E088000000ULL
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#define LMC0_DDR_PLL_CTL0 0x258
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#define LMC0_DDR_PLL_CTL0 0x258
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/* OCLA */
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@ -44,7 +44,7 @@ union cavium_spi_cfg {
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u64 cslate : 1;
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u64 csena : 4; /* Must be one */
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u64 clkdiv : 13;
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u64 : 35;
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u64 : 35;
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} s;
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};
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@ -69,7 +69,7 @@ union cavium_spi_tx {
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u64 leavecs : 1;
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u64 : 3;
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u64 csid : 2;
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u64 : 42;
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u64 : 42;
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} s;
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};
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@ -34,13 +34,13 @@ union cn81xx_uart_ctl {
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u64 uaa_rst : 1;
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u64 : 2;
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u64 csclk_en : 1;
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u64 : 19;
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u64 : 19;
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u64 h_clkdiv_sel : 3;
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u64 : 1;
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u64 : 1;
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u64 h_clkdiv_rst : 1;
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u64 h_clk_byp_sel : 1;
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u64 h_clk_en : 1;
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u64 : 33;
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u64 : 33;
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} s;
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};
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@ -39,10 +39,10 @@
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* @param twsi_id which TWSI bus to use
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* @param dev_addr Device address (7 bit)
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* @param internal_addr
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* Internal address. Can be 0, 1 or 2 bytes in width
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* Internal address. Can be 0, 1 or 2 bytes in width
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* @param num_bytes Number of data bytes to read (1-4)
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* @param ia_width_bytes
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* Internal address size in bytes (0, 1, or 2)
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* Internal address size in bytes (0, 1, or 2)
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*
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* @return Read data, or -1 on failure
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*/
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@ -77,14 +77,14 @@ int64_t bdk_twsix_read_ia(bdk_node_t node, int twsi_id, uint8_t dev_addr,
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* @param twsi_id which TWSI interface to use
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* @param dev_addr TWSI device address (7 bit only)
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* @param internal_addr
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* TWSI internal address (0, 8, or 16 bits)
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* TWSI internal address (0, 8, or 16 bits)
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* @param num_bytes Number of bytes to write (1-8)
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* @param ia_width_bytes
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* internal address width, in bytes (0, 1, 2)
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* @param data Data to write. Data is written MSB first on the twsi bus, and
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* only the lower num_bytes bytes of the argument are valid. (If
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* a 2 byte write is done, only the low 2 bytes of the argument is
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* used.
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* internal address width, in bytes (0, 1, 2)
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* @param data Data to write. Data is written MSB first on the twsi bus,
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* and only the lower num_bytes bytes of the argument are
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* valid. If a 2 byte write is done, only the low 2 bytes of
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* the argument is used.
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*
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* @return Zero on success, -1 on error
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*/
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