GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

amd/stoneyridge: Add ASL helper for AOAC PwrGood Control 

Add a method to assist with setting the PwrGood Control register, which
will be useful for various devices.

BUG=b:77602074

Change-Id: Ief602c4bc42d27b3e236d24db815b990f3a2419c
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/28771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Marshall Dawson 2018-09-26 15:52:00 -06:00 committed by Martin Roth
parent 9c5dc1fd44
commit cb2b70b3d2
1 changed files with 25 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
View File

@ -639,3 +639,28 @@ Method(FWAK,0, Serialized) /* FCH _WAK */
}
}
}
/*
* Helper for setting a bit in AOACxA0 PwrGood Control
* Arg0: bit to set or clear
* Arg1: 0 = clear bit[Arg0], non-zero = set bit[Arg0]
*/
Method(PWGC,2, Serialized)
{
And (PGA3, 0xdf, Local0) /* do SwUsb3SlpShutdown below */
if(Arg1) {
Or(Arg0, Local0, Local0)
} else {
Not(Arg0, Local1)
And(Local1, Local0, Local0)
}
Store(Local0, PGA3)
if(LEqual(Arg0, 0x20)) { /* if SwUsb3SlpShutdown */
Store(PGA3, Local0)
And(Arg0, Local0, Local0)
while(LNot(Local0)) { /* wait SwUsb3SlpShutdown to complete */
Store(PGA3, Local0)
And(Arg0, Local0, Local0)
}
}
}