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mb/google/poopy/variants/nami: Add Pmax setting 

This patch adds the Pmax setting in device tree. The Pmax is from
MAX(PL4_sku1, PL4_sku2, ..) + ROPmax. Given ROPmax is 30W and
the maximum PL4 is from U42, hence the Pmax = 71W + 30W = 101W.

BUG=b:72138778
BRANCH=None
TEST=USE=fw_debug emerge-nami chromeos-mrc coreboot chromeos-bootimage
         & ensure the Pmax value is passed to FSP-S.

Change-Id: Ief6a134dc5b6bd2b8e07b4a44450e99ff26402d9
Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com>
Reviewed-on: https://review.coreboot.org/23640
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Gaggery Tsai 2018-02-07 17:17:05 +08:00 committed by Martin Roth
parent 9b3da9fc57
commit cb304c1d85
1 changed files with 1 additions and 0 deletions
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src/mainboard/google/poppy/variants/nami/devicetree.cb
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@ -229,6 +229,7 @@ chip soc/intel/skylake
register "speed_shift_enable" = "1" register "speed_shift_enable" = "1"
register "tcc_offset" = "10" # TCC of 90C register "tcc_offset" = "10" # TCC of 90C
register "psys_pmax" = "101"
# Lock Down # Lock Down
register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT" register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"