google/trogdor: Add backlight support for Parade ps8640
Add backlight support in ps8640 through the AUX channel using eDP DPCD registers. BUG=b:202966352 BRANCH=trogdor TEST=verified firmware screen works on homestar rev4 Change-Id: Ief1bf56c89c8215427dcbddfc67e8bcd4c3607d2 Signed-off-by: xuxinxiong <xuxinxiong@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58624 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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cb3745c407
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@ -5,7 +5,7 @@
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#include <edid.h>
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#include <edid.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <timer.h>
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#include <timer.h>
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#include <dp_aux.h>
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#include "ps8640.h"
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#include "ps8640.h"
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int ps8640_get_edid(uint8_t bus, uint8_t chip, struct edid *out)
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int ps8640_get_edid(uint8_t bus, uint8_t chip, struct edid *out)
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@ -80,3 +80,101 @@ int ps8640_init(uint8_t bus, uint8_t chip)
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return 0;
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return 0;
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}
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}
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static cb_err_t ps8640_bridge_aux_request(uint8_t bus,
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uint8_t chip,
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unsigned int target_reg,
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unsigned int total_size,
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enum aux_request request,
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uint8_t *data)
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{
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int i;
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uint32_t length;
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uint8_t buf;
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uint8_t reg;
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int ret;
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if (target_reg & ~SWAUX_ADDR_MASK)
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return CB_ERR;
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while (total_size) {
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length = MIN(total_size, DP_AUX_MAX_PAYLOAD_BYTES);
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total_size -= length;
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ret = i2c_writeb(bus, chip, PAGE0_AUXCH_CFG3, AUXCH_CFG3_RESET);
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if (ret)
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return CB_ERR;
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enum i2c_over_aux cmd = dp_get_aux_cmd(request, total_size);
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if (i2c_writeb(bus, chip, PAGE0_SWAUX_ADDR_23_16,
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(target_reg >> 16) | (cmd << 4)) ||
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i2c_writeb(bus, chip, PAGE0_SWAUX_ADDR_15_8, target_reg >> 8) ||
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i2c_writeb(bus, chip, PAGE0_SWAUX_ADDR_7_0, target_reg)) {
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return CB_ERR;
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}
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if (dp_aux_request_is_write(request)) {
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reg = PAGE0_SWAUX_WDATA;
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for (i = 0; i < length; i++) {
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ret = i2c_writeb(bus, chip, reg++, *data++);
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if (ret)
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return CB_ERR;
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}
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} else {
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if (length == 0)
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i2c_writeb(bus, chip, PAGE0_SWAUX_LENGTH, SWAUX_NO_PAYLOAD);
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else
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i2c_writeb(bus, chip, PAGE0_SWAUX_LENGTH, length - 1);
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}
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ret = i2c_writeb(bus, chip, PAGE0_SWAUX_CTRL, SWAUX_SEND);
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if (ret)
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return CB_ERR;
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if (!wait_ms(100, !i2c_readb(bus, chip, PAGE0_SWAUX_CTRL, &buf) &&
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!(buf & SWAUX_SEND)))
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return CB_ERR;
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if (i2c_readb(bus, chip, PAGE0_SWAUX_STATUS, &buf))
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return CB_ERR;
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switch (buf & SWAUX_STATUS_MASK) {
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case SWAUX_STATUS_NACK:
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case SWAUX_STATUS_I2C_NACK:
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case SWAUX_STATUS_INVALID:
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case SWAUX_STATUS_TIMEOUT:
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return CB_ERR;
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case SWAUX_STATUS_ACKM:
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length = buf & SWAUX_M_MASK;
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break;
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}
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if (length && !dp_aux_request_is_write(request)) {
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reg = PAGE0_SWAUX_RDATA;
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for (i = 0; i < length; i++) {
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if (i2c_readb(bus, chip, reg++, &buf))
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return CB_ERR;
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*data++ = buf;
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}
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}
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}
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return CB_SUCCESS;
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}
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void ps8640_backlight_enable(uint8_t bus, uint8_t chip)
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{
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uint8_t val;
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val = DP_BACKLIGHT_CONTROL_MODE_DPCD;
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ps8640_bridge_aux_request(bus, chip, DP_BACKLIGHT_MODE_SET, 1,
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DPCD_WRITE, &val);
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val = 0xff;
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ps8640_bridge_aux_request(bus, chip, DP_BACKLIGHT_BRIGHTNESS_MSB, 1,
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DPCD_WRITE, &val);
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val = DP_BACKLIGHT_ENABLE;
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ps8640_bridge_aux_request(bus, chip, DP_DISPLAY_CONTROL_REGISTER, 1,
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DPCD_WRITE, &val);
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}
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@ -24,11 +24,33 @@ enum {
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};
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};
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enum {
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enum {
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EDID_LENGTH = 128,
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PAGE0_AUXCH_CFG3 = 0x76,
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EDID_I2C_ADDR = 0x50,
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AUXCH_CFG3_RESET = 0xff,
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EDID_EXTENSION_FLAG = 0x7e,
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PAGE0_SWAUX_ADDR_7_0 = 0x7d,
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PAGE0_SWAUX_ADDR_15_8 = 0x7e,
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PAGE0_SWAUX_ADDR_23_16 = 0x7f,
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SWAUX_ADDR_MASK = 0xfffff,
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PAGE0_SWAUX_LENGTH = 0x80,
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SWAUX_LENGTH_MASK = 0xf,
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SWAUX_NO_PAYLOAD = BIT(7),
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PAGE0_SWAUX_WDATA = 0x81,
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PAGE0_SWAUX_RDATA = 0x82,
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PAGE0_SWAUX_CTRL = 0x83,
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SWAUX_SEND = BIT(0),
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PAGE0_SWAUX_STATUS = 0x84,
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SWAUX_M_MASK = 0x1f,
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SWAUX_STATUS_MASK = (0x7 << 5),
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SWAUX_STATUS_NACK = (0x1 << 5),
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SWAUX_STATUS_DEFER = (0x2 << 5),
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SWAUX_STATUS_ACKM = (0x3 << 5),
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SWAUX_STATUS_INVALID = (0x4 << 5),
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SWAUX_STATUS_I2C_NACK = (0x5 << 5),
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SWAUX_STATUS_I2C_DEFER = (0x6 << 5),
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SWAUX_STATUS_TIMEOUT = (0x7 << 5),
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};
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};
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int ps8640_init(uint8_t bus, uint8_t chip);
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int ps8640_init(uint8_t bus, uint8_t chip);
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int ps8640_get_edid(uint8_t bus, uint8_t chip, struct edid *out);
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int ps8640_get_edid(uint8_t bus, uint8_t chip, struct edid *out);
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void ps8640_backlight_enable(uint8_t bus, uint8_t chip);
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#endif
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#endif
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@ -4,6 +4,7 @@
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#include <delay.h>
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#include <delay.h>
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#include <endian.h>
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#include <endian.h>
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#include <device/i2c_simple.h>
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#include <device/i2c_simple.h>
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#include <dp_aux.h>
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#include <edid.h>
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#include <edid.h>
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#include <timer.h>
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#include <timer.h>
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#include <types.h>
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#include <types.h>
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@ -31,14 +32,6 @@
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#define DP_MAX_SUPPORTED_RATES 8 /* 16-bit little-endian */
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#define DP_MAX_SUPPORTED_RATES 8 /* 16-bit little-endian */
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#define DP_LANE_COUNT_MASK 0xf
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#define DP_LANE_COUNT_MASK 0xf
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/* Backlight configuration */
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#define DP_BACKLIGHT_MODE_SET 0x721
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#define DP_BACKLIGHT_CONTROL_MODE_MASK 0x3
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#define DP_BACKLIGHT_CONTROL_MODE_DPCD 0x2
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#define DP_DISPLAY_CONTROL_REGISTER 0x720
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#define DP_BACKLIGHT_ENABLE 0x1
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#define DP_BACKLIGHT_BRIGHTNESS_MSB 0x722
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/* link configuration */
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/* link configuration */
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#define DP_LINK_BW_SET 0x100
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#define DP_LINK_BW_SET 0x100
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#define DP_LINK_BW_1_62 0x06
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#define DP_LINK_BW_1_62 0x06
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@ -132,17 +125,6 @@ enum vstream_config {
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VSTREAM_ENABLE = 1,
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VSTREAM_ENABLE = 1,
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};
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};
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enum i2c_over_aux {
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I2C_OVER_AUX_WRITE_MOT_0 = 0x0,
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I2C_OVER_AUX_READ_MOT_0 = 0x1,
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I2C_OVER_AUX_WRITE_STATUS_UPDATE_0 = 0x2,
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I2C_OVER_AUX_WRITE_MOT_1 = 0x4,
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I2C_OVER_AUX_READ_MOT_1 = 0x5,
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I2C_OVER_AUX_WRITE_STATUS_UPDATE_1 = 0x6,
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NATIVE_AUX_WRITE = 0x8,
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NATIVE_AUX_READ = 0x9,
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};
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enum aux_cmd_status {
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enum aux_cmd_status {
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NAT_I2C_FAIL = 1 << 6,
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NAT_I2C_FAIL = 1 << 6,
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AUX_SHORT = 1 << 5,
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AUX_SHORT = 1 << 5,
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@ -166,21 +148,6 @@ enum ml_tx_mode {
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REDRIVER_SEMI_AUTO_LINK_TRAINING = 0xb,
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REDRIVER_SEMI_AUTO_LINK_TRAINING = 0xb,
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};
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};
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enum aux_request {
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DPCD_READ,
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DPCD_WRITE,
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I2C_RAW_READ,
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I2C_RAW_WRITE,
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I2C_RAW_READ_AND_STOP,
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I2C_RAW_WRITE_AND_STOP,
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};
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enum {
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EDID_LENGTH = 128,
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EDID_I2C_ADDR = 0x50,
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EDID_EXTENSION_FLAG = 0x7e,
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};
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/*
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/*
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* LUT index corresponds to register value and LUT values corresponds
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* LUT index corresponds to register value and LUT values corresponds
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* to dp data rate supported by the bridge in Mbps unit.
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* to dp data rate supported by the bridge in Mbps unit.
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@ -189,41 +156,6 @@ static const unsigned int sn65dsi86_bridge_dp_rate_lut[] = {
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0, 1620, 2160, 2430, 2700, 3240, 4320, 5400
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0, 1620, 2160, 2430, 2700, 3240, 4320, 5400
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};
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};
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static bool request_is_write(enum aux_request request)
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{
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switch (request) {
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case I2C_RAW_WRITE_AND_STOP:
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case I2C_RAW_WRITE:
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case DPCD_WRITE:
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return true;
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default:
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return false;
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}
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}
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static enum i2c_over_aux get_aux_cmd(enum aux_request request, uint32_t remaining_after_this)
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{
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switch (request) {
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case I2C_RAW_WRITE_AND_STOP:
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if (!remaining_after_this)
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return I2C_OVER_AUX_WRITE_MOT_0;
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/* fallthrough */
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case I2C_RAW_WRITE:
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return I2C_OVER_AUX_WRITE_MOT_1;
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case I2C_RAW_READ_AND_STOP:
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if (!remaining_after_this)
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return I2C_OVER_AUX_READ_MOT_0;
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/* fallthrough */
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case I2C_RAW_READ:
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return I2C_OVER_AUX_READ_MOT_1;
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case DPCD_WRITE:
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return NATIVE_AUX_WRITE;
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case DPCD_READ:
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default:
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return NATIVE_AUX_READ;
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}
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}
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static cb_err_t sn65dsi86_bridge_aux_request(uint8_t bus,
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static cb_err_t sn65dsi86_bridge_aux_request(uint8_t bus,
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uint8_t chip,
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uint8_t chip,
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unsigned int target_reg,
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unsigned int target_reg,
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@ -241,10 +173,10 @@ static cb_err_t sn65dsi86_bridge_aux_request(uint8_t bus,
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NAT_I2C_FAIL | AUX_SHORT | AUX_DFER | AUX_RPLY_TOUT | SEND_INT);
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NAT_I2C_FAIL | AUX_SHORT | AUX_DFER | AUX_RPLY_TOUT | SEND_INT);
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while (total_size) {
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while (total_size) {
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length = MIN(total_size, 16);
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length = MIN(total_size, DP_AUX_MAX_PAYLOAD_BYTES);
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total_size -= length;
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total_size -= length;
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enum i2c_over_aux cmd = get_aux_cmd(request, total_size);
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enum i2c_over_aux cmd = dp_get_aux_cmd(request, total_size);
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if (i2c_writeb(bus, chip, SN_AUX_CMD_REG, (cmd << 4)) ||
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if (i2c_writeb(bus, chip, SN_AUX_CMD_REG, (cmd << 4)) ||
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i2c_writeb(bus, chip, SN_AUX_ADDR_19_16_REG, (target_reg >> 16) & 0xF) ||
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i2c_writeb(bus, chip, SN_AUX_ADDR_19_16_REG, (target_reg >> 16) & 0xF) ||
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i2c_writeb(bus, chip, SN_AUX_ADDR_15_8_REG, (target_reg >> 8) & 0xFF) ||
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i2c_writeb(bus, chip, SN_AUX_ADDR_15_8_REG, (target_reg >> 8) & 0xFF) ||
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@ -252,7 +184,7 @@ static cb_err_t sn65dsi86_bridge_aux_request(uint8_t bus,
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i2c_writeb(bus, chip, SN_AUX_LENGTH_REG, length))
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i2c_writeb(bus, chip, SN_AUX_LENGTH_REG, length))
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return CB_ERR;
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return CB_ERR;
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if (request_is_write(request)) {
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if (dp_aux_request_is_write(request)) {
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reg = SN_AUX_WDATA_REG_0;
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reg = SN_AUX_WDATA_REG_0;
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for (i = 0; i < length; i++)
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for (i = 0; i < length; i++)
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if (i2c_writeb(bus, chip, reg++, *data++))
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if (i2c_writeb(bus, chip, reg++, *data++))
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@ -273,7 +205,7 @@ static cb_err_t sn65dsi86_bridge_aux_request(uint8_t bus,
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return CB_ERR;
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return CB_ERR;
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}
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}
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if (!request_is_write(request)) {
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if (!dp_aux_request_is_write(request)) {
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reg = SN_AUX_RDATA_REG_0;
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reg = SN_AUX_RDATA_REG_0;
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for (i = 0; i < length; i++) {
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for (i = 0; i < length; i++) {
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if (i2c_readb(bus, chip, reg++, &buf))
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if (i2c_readb(bus, chip, reg++, &buf))
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@ -0,0 +1,48 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _DP_AUX_H_
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#define _DP_AUX_H_
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#include <types.h>
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enum {
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EDID_LENGTH = 128,
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EDID_I2C_ADDR = 0x50,
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EDID_EXTENSION_FLAG = 0x7e,
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};
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enum i2c_over_aux {
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I2C_OVER_AUX_WRITE_MOT_0 = 0x0,
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I2C_OVER_AUX_READ_MOT_0 = 0x1,
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I2C_OVER_AUX_WRITE_STATUS_UPDATE_0 = 0x2,
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I2C_OVER_AUX_WRITE_MOT_1 = 0x4,
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I2C_OVER_AUX_READ_MOT_1 = 0x5,
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I2C_OVER_AUX_WRITE_STATUS_UPDATE_1 = 0x6,
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NATIVE_AUX_WRITE = 0x8,
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NATIVE_AUX_READ = 0x9,
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};
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enum aux_request {
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DPCD_READ,
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DPCD_WRITE,
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I2C_RAW_READ,
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I2C_RAW_WRITE,
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I2C_RAW_READ_AND_STOP,
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I2C_RAW_WRITE_AND_STOP,
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};
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/* Backlight configuration */
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#define DP_BACKLIGHT_MODE_SET 0x721
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||||||
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#define DP_BACKLIGHT_CONTROL_MODE_MASK 0x3
|
||||||
|
#define DP_BACKLIGHT_CONTROL_MODE_DPCD 0x2
|
||||||
|
#define DP_DISPLAY_CONTROL_REGISTER 0x720
|
||||||
|
#define DP_BACKLIGHT_ENABLE 0x1
|
||||||
|
#define DP_BACKLIGHT_BRIGHTNESS_MSB 0x722
|
||||||
|
|
||||||
|
#define DP_AUX_MAX_PAYLOAD_BYTES 16
|
||||||
|
|
||||||
|
|
||||||
|
bool dp_aux_request_is_write(enum aux_request request);
|
||||||
|
enum i2c_over_aux dp_get_aux_cmd(enum aux_request request, uint32_t remaining_after_this);
|
||||||
|
|
||||||
|
#endif
|
|
@ -147,6 +147,7 @@ ramstage-$(CONFIG_BOOTSPLASH) += bootsplash.c
|
||||||
ramstage-$(CONFIG_BOOTSPLASH) += jpeg.c
|
ramstage-$(CONFIG_BOOTSPLASH) += jpeg.c
|
||||||
ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
|
ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
|
||||||
ramstage-$(CONFIG_COVERAGE) += libgcov.c
|
ramstage-$(CONFIG_COVERAGE) += libgcov.c
|
||||||
|
ramstage-y += dp_aux.c
|
||||||
ramstage-y += edid.c
|
ramstage-y += edid.c
|
||||||
ramstage-y += edid_fill_fb.c
|
ramstage-y += edid_fill_fb.c
|
||||||
ramstage-y += memrange.c
|
ramstage-y += memrange.c
|
||||||
|
|
|
@ -0,0 +1,41 @@
|
||||||
|
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||||
|
|
||||||
|
#include <delay.h>
|
||||||
|
#include <dp_aux.h>
|
||||||
|
#include <console/console.h>
|
||||||
|
#include <timer.h>
|
||||||
|
|
||||||
|
bool dp_aux_request_is_write(enum aux_request request)
|
||||||
|
{
|
||||||
|
switch (request) {
|
||||||
|
case I2C_RAW_WRITE_AND_STOP:
|
||||||
|
case I2C_RAW_WRITE:
|
||||||
|
case DPCD_WRITE:
|
||||||
|
return true;
|
||||||
|
default:
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
enum i2c_over_aux dp_get_aux_cmd(enum aux_request request, uint32_t remaining_after_this)
|
||||||
|
{
|
||||||
|
switch (request) {
|
||||||
|
case I2C_RAW_WRITE_AND_STOP:
|
||||||
|
if (!remaining_after_this)
|
||||||
|
return I2C_OVER_AUX_WRITE_MOT_0;
|
||||||
|
/* fallthrough */
|
||||||
|
case I2C_RAW_WRITE:
|
||||||
|
return I2C_OVER_AUX_WRITE_MOT_1;
|
||||||
|
case I2C_RAW_READ_AND_STOP:
|
||||||
|
if (!remaining_after_this)
|
||||||
|
return I2C_OVER_AUX_READ_MOT_0;
|
||||||
|
/* fallthrough */
|
||||||
|
case I2C_RAW_READ:
|
||||||
|
return I2C_OVER_AUX_READ_MOT_1;
|
||||||
|
case DPCD_WRITE:
|
||||||
|
return NATIVE_AUX_WRITE;
|
||||||
|
case DPCD_READ:
|
||||||
|
default:
|
||||||
|
return NATIVE_AUX_READ;
|
||||||
|
}
|
||||||
|
}
|
Loading…
Reference in New Issue