success. It boots as a bproc slave now.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
53311091a6
commit
cb3f498296
|
@ -686,13 +686,25 @@ unsigned int pci_scan_bridge(struct device *dev, unsigned int max)
|
||||||
*/
|
*/
|
||||||
static void pci_level_irq(unsigned char intNum)
|
static void pci_level_irq(unsigned char intNum)
|
||||||
{
|
{
|
||||||
unsigned intBits = inb(0x4d0) | (((unsigned) inb(0x4d1)) << 8);
|
unsigned short intBits = inb(0x4d0) | (((unsigned) inb(0x4d1)) << 8);
|
||||||
|
|
||||||
|
printk_spew("%s: current ints are 0x%x\n", __FUNCTION__, intBits);
|
||||||
intBits |= (1 << intNum);
|
intBits |= (1 << intNum);
|
||||||
|
|
||||||
|
printk_spew("%s: try to set ints 0x%x\n", __FUNCTION__, intBits);
|
||||||
|
|
||||||
// Write new values
|
// Write new values
|
||||||
outb((unsigned char) intBits, 0x4d0);
|
outb((unsigned char) intBits, 0x4d0);
|
||||||
outb((unsigned char) (intBits >> 8), 0x4d1);
|
outb((unsigned char) (intBits >> 8), 0x4d1);
|
||||||
|
|
||||||
|
if (inb(0x4d0) != (intBits & 0xf)) {
|
||||||
|
printk_err("%s: lower order bits are wrong: want 0x%x, got 0x%x\n",
|
||||||
|
__FUNCTION__, intBits &0xf, inb(0x4d0));
|
||||||
|
}
|
||||||
|
if (inb(0x4d1) != ((intBits >> 8) & 0xf)) {
|
||||||
|
printk_err("%s: lower order bits are wrong: want 0x%x, got 0x%x\n",
|
||||||
|
__FUNCTION__, (intBits>>8) &0xf, inb(0x4d1));
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -64,6 +64,20 @@ enable_mainboard_devices(void) {
|
||||||
}
|
}
|
||||||
pci_write_config8(dev, 0x50, 7);
|
pci_write_config8(dev, 0x50, 7);
|
||||||
pci_write_config8(dev, 0x51, 0xff);
|
pci_write_config8(dev, 0x51, 0xff);
|
||||||
|
#if 0
|
||||||
|
// This early setup switches IDE into compatibility mode before PCI gets
|
||||||
|
// // a chance to assign I/Os
|
||||||
|
// movl $CONFIG_ADDR(0, 0x89, 0x42), %eax
|
||||||
|
// // movb $0x09, %dl
|
||||||
|
// movb $0x00, %dl
|
||||||
|
// PCI_WRITE_CONFIG_BYTE
|
||||||
|
//
|
||||||
|
#endif
|
||||||
|
/* we do this here as in V2, we can not yet do raw operations
|
||||||
|
* to pci!
|
||||||
|
*/
|
||||||
|
dev++; /* ICKY */
|
||||||
|
pci_write_config8(dev, 0x42, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
|
|
|
@ -50,7 +50,54 @@ static void enumerate(struct chip *chip)
|
||||||
chip->dev->ops = &default_pci_ops_bus;
|
chip->dev->ops = &default_pci_ops_bus;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* This fixup is based on capturing values from an Award bios. Without
|
||||||
|
* this fixup the DMA write performance is awful (i.e. hdparm -t /dev/hda is 20x
|
||||||
|
* slower than normal, ethernet drops packets).
|
||||||
|
* Apparently these registers govern some sort of bus master behavior.
|
||||||
|
*/
|
||||||
|
static void
|
||||||
|
random_fixup() {
|
||||||
|
device_t *pcidev = dev_find_slot(0, 0);
|
||||||
|
|
||||||
|
printk_spew("VT8601 random fixup ...\n");
|
||||||
|
if (pcidev) {
|
||||||
|
pci_write_config8(pcidev, 0x70, 0xc0);
|
||||||
|
pci_write_config8(pcidev, 0x71, 0x88);
|
||||||
|
pci_write_config8(pcidev, 0x72, 0xec);
|
||||||
|
pci_write_config8(pcidev, 0x73, 0x0c);
|
||||||
|
pci_write_config8(pcidev, 0x74, 0x0e);
|
||||||
|
pci_write_config8(pcidev, 0x75, 0x81);
|
||||||
|
pci_write_config8(pcidev, 0x76, 0x52);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static void
|
||||||
|
northbridge_init(struct chip *chip, enum chip_pass pass)
|
||||||
|
{
|
||||||
|
|
||||||
|
struct northbridge_via_vt8601_config *conf =
|
||||||
|
(struct northbridge_via_vt8601_config *)chip->chip_info;
|
||||||
|
|
||||||
|
switch (pass) {
|
||||||
|
case CONF_PASS_PRE_PCI:
|
||||||
|
break;
|
||||||
|
|
||||||
|
case CONF_PASS_POST_PCI:
|
||||||
|
break;
|
||||||
|
|
||||||
|
case CONF_PASS_PRE_BOOT:
|
||||||
|
random_fixup();
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
/* nothing yet */
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
struct chip_control northbridge_via_vt8601_control = {
|
struct chip_control northbridge_via_vt8601_control = {
|
||||||
.enumerate = enumerate,
|
.enumerate = enumerate,
|
||||||
|
enable: northbridge_init,
|
||||||
.name = "VIA vt8601 Northbridge",
|
.name = "VIA vt8601 Northbridge",
|
||||||
};
|
};
|
||||||
|
|
|
@ -149,7 +149,7 @@ static void vt8231_pci_enable(struct southbridge_via_vt8231_config *conf) {
|
||||||
/*
|
/*
|
||||||
unsigned long busdevfn = 0x8000;
|
unsigned long busdevfn = 0x8000;
|
||||||
if (conf->enable_ide) {
|
if (conf->enable_ide) {
|
||||||
printk_spew("%s: enabling IDE function\n", __FUNCTION__);
|
printk_debug("%s: enabling IDE function\n", __FUNCTION__);
|
||||||
}
|
}
|
||||||
*/
|
*/
|
||||||
}
|
}
|
||||||
|
@ -203,6 +203,20 @@ static void pci_routing_fixup(void)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void
|
||||||
|
dump_south(void){
|
||||||
|
device_t dev0;
|
||||||
|
dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
|
||||||
|
int i,j;
|
||||||
|
|
||||||
|
for(i = 0; i < 256; i += 16) {
|
||||||
|
printk_debug("0x%x: ", i);
|
||||||
|
for(j = 0; j < 16; j++) {
|
||||||
|
printk_debug("%02x ", pci_read_config8(dev0, i+j));
|
||||||
|
}
|
||||||
|
printk_debug("\n");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static void vt8231_init(struct southbridge_via_vt8231_config *conf)
|
static void vt8231_init(struct southbridge_via_vt8231_config *conf)
|
||||||
{
|
{
|
||||||
|
@ -214,7 +228,7 @@ static void vt8231_init(struct southbridge_via_vt8231_config *conf)
|
||||||
// to do: use the pcibios_find function here, instead of
|
// to do: use the pcibios_find function here, instead of
|
||||||
// hard coding the devfn.
|
// hard coding the devfn.
|
||||||
// done - kevinh/Ispiri
|
// done - kevinh/Ispiri
|
||||||
printk_spew("vt8231 init\n");
|
printk_debug("vt8231 init\n");
|
||||||
/* Base 8231 controller */
|
/* Base 8231 controller */
|
||||||
dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
|
dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
|
||||||
/* IDE controller */
|
/* IDE controller */
|
||||||
|
@ -303,7 +317,7 @@ static void vt8231_init(struct southbridge_via_vt8231_config *conf)
|
||||||
// com2 to 3, com1 to 4
|
// com2 to 3, com1 to 4
|
||||||
pci_write_config8(dev0, 0x46, 0x04);
|
pci_write_config8(dev0, 0x46, 0x04);
|
||||||
pci_write_config8(dev0, 0x47, 0x03);
|
pci_write_config8(dev0, 0x47, 0x03);
|
||||||
|
pci_write_config8(dev0, 0x6e, 0x98);
|
||||||
//
|
//
|
||||||
// Power management setup
|
// Power management setup
|
||||||
//
|
//
|
||||||
|
@ -409,6 +423,8 @@ static void vt8231_init(struct southbridge_via_vt8231_config *conf)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/* set up isa bus -- i/o recovery time, rom write enable, extend-ale */
|
||||||
|
pci_write_config8(dev0, 0x40, 0x54);
|
||||||
ethernet_fixup();
|
ethernet_fixup();
|
||||||
|
|
||||||
// Start the rtc
|
// Start the rtc
|
||||||
|
@ -434,8 +450,8 @@ southbridge_init(struct chip *chip, enum chip_pass pass)
|
||||||
|
|
||||||
break;
|
break;
|
||||||
case CONF_PASS_PRE_BOOT:
|
case CONF_PASS_PRE_BOOT:
|
||||||
printk_err("FUCK! ROUTING FIXUP!\n");
|
|
||||||
pci_routing_fixup();
|
pci_routing_fixup();
|
||||||
|
dump_south();
|
||||||
break;
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
|
|
|
@ -52,8 +52,8 @@ uses LINUXBIOS_EXTRA_VERSION
|
||||||
option CONFIG_CHIP_CONFIGURE=1
|
option CONFIG_CHIP_CONFIGURE=1
|
||||||
option CONFIG_KEYBOARD=1
|
option CONFIG_KEYBOARD=1
|
||||||
|
|
||||||
option MAXIMUM_CONSOLE_LOGLEVEL=10
|
option MAXIMUM_CONSOLE_LOGLEVEL=8
|
||||||
option DEFAULT_CONSOLE_LOGLEVEL=10
|
option DEFAULT_CONSOLE_LOGLEVEL=8
|
||||||
option CONFIG_CONSOLE_SERIAL8250=1
|
option CONFIG_CONSOLE_SERIAL8250=1
|
||||||
|
|
||||||
option CPU_FIXUP=1
|
option CPU_FIXUP=1
|
||||||
|
|
Loading…
Reference in New Issue