success. It boots as a bproc slave now.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
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53311091a6
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cb3f498296
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@ -686,13 +686,25 @@ unsigned int pci_scan_bridge(struct device *dev, unsigned int max)
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*/
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static void pci_level_irq(unsigned char intNum)
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{
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unsigned intBits = inb(0x4d0) | (((unsigned) inb(0x4d1)) << 8);
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unsigned short intBits = inb(0x4d0) | (((unsigned) inb(0x4d1)) << 8);
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printk_spew("%s: current ints are 0x%x\n", __FUNCTION__, intBits);
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intBits |= (1 << intNum);
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printk_spew("%s: try to set ints 0x%x\n", __FUNCTION__, intBits);
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// Write new values
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outb((unsigned char) intBits, 0x4d0);
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outb((unsigned char) (intBits >> 8), 0x4d1);
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if (inb(0x4d0) != (intBits & 0xf)) {
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printk_err("%s: lower order bits are wrong: want 0x%x, got 0x%x\n",
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__FUNCTION__, intBits &0xf, inb(0x4d0));
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}
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if (inb(0x4d1) != ((intBits >> 8) & 0xf)) {
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printk_err("%s: lower order bits are wrong: want 0x%x, got 0x%x\n",
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__FUNCTION__, (intBits>>8) &0xf, inb(0x4d1));
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}
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}
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@ -64,6 +64,20 @@ enable_mainboard_devices(void) {
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}
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pci_write_config8(dev, 0x50, 7);
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pci_write_config8(dev, 0x51, 0xff);
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#if 0
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// This early setup switches IDE into compatibility mode before PCI gets
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// // a chance to assign I/Os
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// movl $CONFIG_ADDR(0, 0x89, 0x42), %eax
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// // movb $0x09, %dl
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// movb $0x00, %dl
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// PCI_WRITE_CONFIG_BYTE
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//
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#endif
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/* we do this here as in V2, we can not yet do raw operations
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* to pci!
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*/
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dev++; /* ICKY */
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pci_write_config8(dev, 0x42, 0);
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}
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static void
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@ -50,7 +50,54 @@ static void enumerate(struct chip *chip)
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chip->dev->ops = &default_pci_ops_bus;
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}
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/*
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* This fixup is based on capturing values from an Award bios. Without
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* this fixup the DMA write performance is awful (i.e. hdparm -t /dev/hda is 20x
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* slower than normal, ethernet drops packets).
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* Apparently these registers govern some sort of bus master behavior.
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*/
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static void
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random_fixup() {
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device_t *pcidev = dev_find_slot(0, 0);
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printk_spew("VT8601 random fixup ...\n");
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if (pcidev) {
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pci_write_config8(pcidev, 0x70, 0xc0);
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pci_write_config8(pcidev, 0x71, 0x88);
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pci_write_config8(pcidev, 0x72, 0xec);
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pci_write_config8(pcidev, 0x73, 0x0c);
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pci_write_config8(pcidev, 0x74, 0x0e);
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pci_write_config8(pcidev, 0x75, 0x81);
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pci_write_config8(pcidev, 0x76, 0x52);
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}
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}
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static void
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northbridge_init(struct chip *chip, enum chip_pass pass)
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{
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struct northbridge_via_vt8601_config *conf =
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(struct northbridge_via_vt8601_config *)chip->chip_info;
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switch (pass) {
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case CONF_PASS_PRE_PCI:
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break;
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case CONF_PASS_POST_PCI:
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break;
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case CONF_PASS_PRE_BOOT:
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random_fixup();
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break;
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default:
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/* nothing yet */
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break;
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}
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}
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struct chip_control northbridge_via_vt8601_control = {
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.enumerate = enumerate,
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enable: northbridge_init,
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.name = "VIA vt8601 Northbridge",
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};
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@ -149,7 +149,7 @@ static void vt8231_pci_enable(struct southbridge_via_vt8231_config *conf) {
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/*
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unsigned long busdevfn = 0x8000;
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if (conf->enable_ide) {
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printk_spew("%s: enabling IDE function\n", __FUNCTION__);
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printk_debug("%s: enabling IDE function\n", __FUNCTION__);
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}
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*/
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}
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@ -203,6 +203,20 @@ static void pci_routing_fixup(void)
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}
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void
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dump_south(void){
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device_t dev0;
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dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
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int i,j;
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for(i = 0; i < 256; i += 16) {
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printk_debug("0x%x: ", i);
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for(j = 0; j < 16; j++) {
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printk_debug("%02x ", pci_read_config8(dev0, i+j));
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}
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printk_debug("\n");
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}
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}
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static void vt8231_init(struct southbridge_via_vt8231_config *conf)
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{
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@ -214,7 +228,7 @@ static void vt8231_init(struct southbridge_via_vt8231_config *conf)
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// to do: use the pcibios_find function here, instead of
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// hard coding the devfn.
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// done - kevinh/Ispiri
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printk_spew("vt8231 init\n");
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printk_debug("vt8231 init\n");
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/* Base 8231 controller */
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dev0 = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
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/* IDE controller */
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@ -303,7 +317,7 @@ static void vt8231_init(struct southbridge_via_vt8231_config *conf)
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// com2 to 3, com1 to 4
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pci_write_config8(dev0, 0x46, 0x04);
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pci_write_config8(dev0, 0x47, 0x03);
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pci_write_config8(dev0, 0x6e, 0x98);
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//
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// Power management setup
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//
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@ -409,6 +423,8 @@ static void vt8231_init(struct southbridge_via_vt8231_config *conf)
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}
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/* set up isa bus -- i/o recovery time, rom write enable, extend-ale */
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pci_write_config8(dev0, 0x40, 0x54);
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ethernet_fixup();
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// Start the rtc
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@ -434,8 +450,8 @@ southbridge_init(struct chip *chip, enum chip_pass pass)
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break;
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case CONF_PASS_PRE_BOOT:
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printk_err("FUCK! ROUTING FIXUP!\n");
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pci_routing_fixup();
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dump_south();
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break;
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default:
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@ -52,8 +52,8 @@ uses LINUXBIOS_EXTRA_VERSION
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option CONFIG_CHIP_CONFIGURE=1
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option CONFIG_KEYBOARD=1
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option MAXIMUM_CONSOLE_LOGLEVEL=10
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option DEFAULT_CONSOLE_LOGLEVEL=10
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option MAXIMUM_CONSOLE_LOGLEVEL=8
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option DEFAULT_CONSOLE_LOGLEVEL=8
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option CONFIG_CONSOLE_SERIAL8250=1
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option CPU_FIXUP=1
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