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intel/skylake: Add function to read state of Deep S5 

Add a function to read the current state of Deep S5 configuration
and indicate if it is enabled (for AC and/or DC) or disabled.

This is similar to the existing function that checks Deep S3
enable state.

BUG=b:36042662
BRANCH=none
TEST=tested with subsequent commits to check Deep S5 state at boot
and filter event log messages if it is enabled.

Change-Id: I4b60fb99a99952cb3ca6be29f257bb5894ff5a52
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/18663
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2017-03-07 19:03:50 -08:00
parent b2aac85030
commit cb76d50f0d
1 changed files with 8 additions and 0 deletions
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8
src/soc/intel/skylake/include/soc/pm.h
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@ -198,4 +198,12 @@ static inline int deep_s3_enabled(void)
return !!(deep_s3_pol & (S3DC_GATE_SUS | S3AC_GATE_SUS)); return !!(deep_s3_pol & (S3DC_GATE_SUS | S3AC_GATE_SUS));
} }
static inline int deep_s5_enabled(void)
{
uint32_t deep_s5_pol;
deep_s5_pol = read32(pmc_mmio_regs() + S5_PWRGATE_POL);
return !!(deep_s5_pol & (S5DC_GATE_SUS | S5AC_GATE_SUS));
}
#endif #endif