soc/cavium: Drop unneeded empty lines

Change-Id: I01227e3c5b650f56e81c5c8e724e3768f06f4530
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44597
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes HAOUAS 2020-08-19 21:43:59 +02:00 committed by Michael Niewöhner
parent ed098694b0
commit cb795f0ff9
6 changed files with 0 additions and 8 deletions

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@ -39,7 +39,6 @@ u64 thunderx_get_ref_clock(void)
return PLL_REF_CLK; return PLL_REF_CLK;
} }
/** /**
* Returns the I/O clock speed in Hz * Returns the I/O clock speed in Hz
*/ */

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@ -9,8 +9,6 @@ typedef u32 gpio_t;
#include <gpio.h> #include <gpio.h>
/* The following functions must be implemented by SoC/board code. */ /* The following functions must be implemented by SoC/board code. */
gpio_t gpio_pin_count(void); gpio_t gpio_pin_count(void);
void gpio_invert(gpio_t gpio, int value); void gpio_invert(gpio_t gpio, int value);
int gpio_strap_value(gpio_t gpio); int gpio_strap_value(gpio_t gpio);

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@ -51,7 +51,6 @@ check_member(cn81xx_timer, ctl_cntacr0, 0x20040);
check_member(cn81xx_timer, cwd_wdog[0], 0x40000); check_member(cn81xx_timer, cwd_wdog[0], 0x40000);
check_member(cn81xx_timer, cwd_poke[0], 0x50000); check_member(cn81xx_timer, cwd_poke[0], 0x50000);
#define GTI_CC_CNTCR_EN (1 << 0) #define GTI_CC_CNTCR_EN (1 << 0)
#define GTI_CC_CNTCR_HDBG (1 << 1) #define GTI_CC_CNTCR_HDBG (1 << 1)
#define GTI_CC_CNTCR_FCREQ (1 << 8) #define GTI_CC_CNTCR_FCREQ (1 << 8)

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@ -47,7 +47,6 @@ struct cn81xx_uart {
#define UART_FBRD_BAUD_DIVFRAC_SHIFT 0 #define UART_FBRD_BAUD_DIVFRAC_SHIFT 0
#define UART_FBRD_BAUD_DIVFRAC_MASK 0x3f #define UART_FBRD_BAUD_DIVFRAC_MASK 0x3f
check_member(cn81xx_uart, uctl_ctl, 0x1000); check_member(cn81xx_uart, uctl_ctl, 0x1000);
check_member(cn81xx_uart, uctl_spare1, 0x10f8); check_member(cn81xx_uart, uctl_spare1, 0x10f8);

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@ -13,12 +13,10 @@ __attribute__((weak)) void bootblock_soc_early_init(void) { /* do nothing */ }
__attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ } __attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ }
__attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ } __attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ }
/* C code entry point for the boot block */ /* C code entry point for the boot block */
void bootblock_main(const uint64_t reg_x0, void bootblock_main(const uint64_t reg_x0,
const uint64_t reg_pc) const uint64_t reg_pc)
{ {
init_timer(); init_timer();
/* Initialize timestamps if we have TIMESTAMP region in memlayout.ld. */ /* Initialize timestamps if we have TIMESTAMP region in memlayout.ld. */

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@ -12,5 +12,4 @@ void bootblock_mainboard_init(void);
void bootblock_main(const uint64_t reg_x0, void bootblock_main(const uint64_t reg_x0,
const uint64_t reg_pc); const uint64_t reg_pc);
#endif /* SRC_SOC_CAVIUM_COMMON_INCLUDE_SOC_BOOTBLOCK_H_ */ #endif /* SRC_SOC_CAVIUM_COMMON_INCLUDE_SOC_BOOTBLOCK_H_ */