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mb/google/poppy/variants/nami: Disable SATA 

This change disables SATA controller in order to make SATA IP enter
low power status.

BUG=b:72332817
TEST=cat /sys/kernel/debug/pmc_core/pch_ip_power_gating_status
     and verify SATA IP enters low power state

Change-Id: I72a98bc3d0b47aebc0d7be534f4a7503084b257f
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://review.coreboot.org/23354
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kane Chen 2018-01-22 16:24:10 +08:00 committed by Aaron Durbin
parent c96a4f6b6b
commit cb8123ae48
1 changed files with 3 additions and 5 deletions
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8
src/mainboard/google/poppy/variants/nami/devicetree.cb
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@ -27,11 +27,9 @@ chip soc/intel/skylake
# FSP Configuration
register "ProbelessTrace" = "0"
register "EnableLan" = "0"
register "EnableSata" = "1"
register "SataSalpSupport" = "1"
register "EnableSata" = "0"
register "SataSalpSupport" = "0"
register "SataMode" = "0"
register "SataPortsEnable[1]" = "1"
register "SataPortsDevSlp[1]" = "1"
register "EnableAzalia" = "1"
register "DspEnable" = "1"
register "IoBufferOwnership" = "3"
@ -284,7 +282,7 @@ chip soc/intel/skylake
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT Redirection
device pci 16.4 off end # Management Engine Interface 3
device pci 17.0 on end # SATA
device pci 17.0 off end # SATA
device pci 19.0 on end # UART #2
device pci 19.1 off end # I2C #5
device pci 19.2 off end # I2C #4