spd: Add new LP5 parts and generate SPDs

Add the parts below which will be used by the brya variant Vell. Add
the parts to memory_parts.json and generate the SPDs using spd_gen.

Micron MT62F512M32D2DR-031 WT:B
Micron MT62F1G32D4DR-031 WT:B
Hynix  H9JCNNNCP3MLYR-N6E

Generated using:
util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

BUG=b:204284866
TEST=None

Change-Id: Ifbcadfb78281b2b78a61a9b61180c421748193a0
Signed-off-by: Reka Norman <rekanorman@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58929
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Reka Norman 2021-11-04 09:49:01 +11:00 committed by Paul Fagerburg
parent 6ea0311469
commit cb902fd6bb
4 changed files with 99 additions and 1 deletions

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@ -1,3 +1,34 @@
{
"parts": []
"parts": [
{
"name": "MT62F512M32D2DR-031 WT:B",
"attribs": {
"densityPerDieGb": 8,
"diesPerPackage": 2,
"bitWidthPerChannel": 16,
"ranksPerChannel": 1,
"speedMbps": 6400
}
},
{
"name": "MT62F1G32D4DR-031 WT:B",
"attribs": {
"densityPerDieGb": 8,
"diesPerPackage": 4,
"bitWidthPerChannel": 16,
"ranksPerChannel": 2,
"speedMbps": 6400
}
},
{
"name": "H9JCNNNCP3MLYR-N6E",
"attribs": {
"densityPerDieGb": 8,
"diesPerPackage": 4,
"bitWidthPerChannel": 16,
"ranksPerChannel": 2,
"speedMbps": 6400
}
}
]
}

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@ -1,3 +1,6 @@
# Generated by:
# util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5
MT62F512M32D2DR-031 WT:B,spd-1.hex
MT62F1G32D4DR-031 WT:B,spd-2.hex
H9JCNNNCP3MLYR-N6E,spd-2.hex

32
spd/lp5/set-0/spd-1.hex Normal file
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@ -0,0 +1,32 @@
23 10 13 0E 15 1A 95 08 00 00 00 00 02 01 00 00
00 00 0A 00 00 00 00 00 AA 00 90 A8 90 90 06 C0
03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

32
spd/lp5/set-0/spd-2.hex Normal file
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@ -0,0 +1,32 @@
23 10 13 0E 15 1A B5 08 00 00 00 00 0A 01 00 00
00 00 0A 00 00 00 00 00 AA 00 90 A8 90 90 06 C0
03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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