soc/amd/cezanne/Kconfig: select IDT_IN_EVERY_STAGE

This adds interrupt handlers that end up calling x86_exception().

Change-Id: I3dce539b6f1ef300cf16f20224744a75100f60b8
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49726
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

src/soc/amd/cezanne/Kconfig

@@ -14,6 +14,7 @@ config SOC_SPECIFIC_OPTIONS
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
 	select HAVE_CF9_RESET
+	select IDT_IN_EVERY_STAGE
 	select IOAPIC
 	select RESET_VECTOR_IN_RAM
 	select SOC_AMD_COMMON