mb/google/poppy: Configure GPP_F3 as NC
GPP_F3 is not connected on poppy or any of its variants. This change configures GPP_F3 as NC on poppy and all the variants. BUG=b:70160119 Change-Id: I303276ab9546d56c846755fa3a6142978f6b8c92 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/22917 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -265,8 +265,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPI_GPIO_DRIVER(GPP_F1, NONE, DEEP),
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/* F2 : I2S2_TXD ==> I2S2_PCH_TX_SPKR_RX_R */
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PAD_CFG_GPI_GPIO_DRIVER(GPP_F2, NONE, DEEP),
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/* F3 : I2S2_RXD */
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PAD_CFG_GPI_GPIO_DRIVER(GPP_F3, NONE, DEEP),
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/* F3 : I2S2_RXD ==> NC */
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PAD_CFG_NC(GPP_F3),
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/* F4 : I2C2_SDA ==> PCH_I2C2_CAM_PMIC_1V8_SDA */
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PAD_CFG_NF_1V8(GPP_F4, NONE, DEEP, NF1),
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/* F5 : I2C2_SCL ==> PCH_I2C2_CAM_PMIC_1V8_SCL */
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@ -265,8 +265,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPI_GPIO_DRIVER(GPP_F1, NONE, DEEP),
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/* F2 : I2S2_TXD ==> I2S2_PCH_TX_SPKR_RX_R */
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PAD_CFG_GPI_GPIO_DRIVER(GPP_F2, NONE, DEEP),
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/* F3 : I2S2_RXD */
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PAD_CFG_GPI_GPIO_DRIVER(GPP_F3, NONE, DEEP),
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/* F3 : I2S2_RXD ==> NC */
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PAD_CFG_NC(GPP_F3),
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/* F4 : I2C2_SDA ==> I2C_2_SDA */
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PAD_CFG_NF_1V8(GPP_F4, NONE, DEEP, NF1),
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/* F5 : I2C2_SCL ==> I2C_2_SCL */
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@ -265,8 +265,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPI(GPP_F1, NONE, DEEP),
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/* F2 : I2S2_TXD ==> CHP1_I2S2_PCH_TX_SPKR_RX_R */
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PAD_CFG_GPI(GPP_F2, NONE, DEEP),
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/* F3 : I2S2_RXD */
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PAD_CFG_GPI(GPP_F3, NONE, DEEP),
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/* F3 : I2S2_RXD ==> NC */
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PAD_CFG_NC(GPP_F3),
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/* F4 : I2C2_SDA ==> CHP1_I2C2_CAM_PMIC_SDA */
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PAD_CFG_NF_1V8(GPP_F4, NONE, DEEP, NF1),
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/* F5 : I2C2_SCL ==> CHP1_I2C2_CAM_PMIC_SCL */
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@ -265,8 +265,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPI_GPIO_DRIVER(GPP_F1, NONE, DEEP),
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/* F2 : I2S2_TXD ==> I2S2_PCH_TX_SPKR_RX_R */
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PAD_CFG_GPI_GPIO_DRIVER(GPP_F2, NONE, DEEP),
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/* F3 : I2S2_RXD */
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PAD_CFG_GPI_GPIO_DRIVER(GPP_F3, NONE, DEEP),
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/* F3 : I2S2_RXD ==> NC */
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PAD_CFG_NC(GPP_F3),
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/* F4 : I2C2_SDA ==> PCH_I2C2_CAM_PMIC_1V8_SDA */
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PAD_CFG_NF_1V8(GPP_F4, NONE, DEEP, NF1),
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/* F5 : I2C2_SCL ==> PCH_I2C2_CAM_PMIC_1V8_SCL */
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