Documentation/nb/intel: Add Haswell documentation
At the moment, this just gives some details on the MRC. Change-Id: I84e8ca2543b2e19b84a24f7d7032a4aedb6e9272 Signed-off-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-on: https://review.coreboot.org/c/30356 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -4,24 +4,10 @@ This page describes how to run coreboot on the [ASRock H81M-HDS].
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## Required proprietary blobs
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This board currently requires a proprietary blob in order to initialise
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the RAM and a few other components. The blob largely consists of Intel's
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Memory Reference Code (shortened to mrc), and is just under 200 KiB
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in size. It is also known as a system agent binary. Unfortunately,
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it is not currently possible to distribute this as part of coreboot.
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However, the mrc can be obtained from a Haswell Chromebook firmware
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image, and you might find one online. The mrc from a ChromeOS image can
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be extracted with the following command. If extracting from a "standard"
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coreboot image, omit `-r RO_SECTION`.
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```bash
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cbfstool coreboot.rom extract -f mrc.bin -n mrc.bin -r RO_SECTION
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```eval_rst
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Please see :doc:`../../northbridge/intel/haswell/mrc.bin`.
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```
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Now, place mrc.bin in the root of the coreboot directory.
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Alternatively, place it anywhere you want, and set `MRC_FILE` to its
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location when building coreboot.
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## Building coreboot
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A fully working image should be possible just by setting your MAC
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@ -0,0 +1,8 @@
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# Intel Haswell documentation
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This section describes the Intel Haswell architecture as it relates to
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coreboot.
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## Proprietary blobs
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- [mrc.bin](mrc.bin.md)
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@ -0,0 +1,35 @@
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# mrc.bin
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All Haswell boards supported by coreboot currently require a proprietary
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blob in order to initialise the DRAM and a few other components. The
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blob, named `mrc.bin`, largely consists of Intel's memory reference code
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(MRC), but it has been tailored specifically for Chrome OS. It is just
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under 200 KiB in size. Another name for `mrc.bin` is the system agent
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binary.
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Having a replacement for `mrc.bin` using native coreboot code is very
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much desired, but it is not an easy task.
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## Obtaining mrc.bin
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Unfortunately, it is not currently possible to distribute `mrc.bin` as
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part of coreboot. Though, it can be obtained from a Haswell Chromebook
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or Chromebox firmware image, and you might find one online. `mrc.bin`
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can be extracted with the following command. If extracting from a
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"standard" coreboot image, omit `-r RO_SECTION`.
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```bash
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cbfstool coreboot.rom extract -f mrc.bin -n mrc.bin -r RO_SECTION
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```
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Now, place `mrc.bin` in the root of the coreboot directory.
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Alternatively, place `mrc.bin` anywhere you want, and set `MRC_FILE` to
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its location when building coreboot.
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## ECC DRAM
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When `mrc.bin` has finished executing, ECC is active on the channels
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populated with ECC DIMMs. However, `mrc.bin` was tailored specifically
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for Haswell Chromebooks and Chomeboxes, none of which support ECC DRAM.
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While ECC likely functions correctly, it is advised to further validate
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the correct operation of ECC if data integrity is absolutely critical.
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@ -4,4 +4,5 @@ This section contains documentation about coreboot on specific Intel Northbridge
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## Platforms
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- [Haswell](haswell/index.md)
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- [Sandy Bridge](sandybridge/index.md)
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