Documentation/nb/intel: Add Haswell documentation

At the moment, this just gives some details on the MRC.

Change-Id: I84e8ca2543b2e19b84a24f7d7032a4aedb6e9272
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30356
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Tristan Corrick 2018-12-21 23:47:03 +13:00 committed by Patrick Georgi
parent a26b02466e
commit cbc561f64a
4 changed files with 46 additions and 16 deletions

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@ -4,24 +4,10 @@ This page describes how to run coreboot on the [ASRock H81M-HDS].
## Required proprietary blobs
This board currently requires a proprietary blob in order to initialise
the RAM and a few other components. The blob largely consists of Intel's
Memory Reference Code (shortened to mrc), and is just under 200 KiB
in size. It is also known as a system agent binary. Unfortunately,
it is not currently possible to distribute this as part of coreboot.
However, the mrc can be obtained from a Haswell Chromebook firmware
image, and you might find one online. The mrc from a ChromeOS image can
be extracted with the following command. If extracting from a "standard"
coreboot image, omit `-r RO_SECTION`.
```bash
cbfstool coreboot.rom extract -f mrc.bin -n mrc.bin -r RO_SECTION
```eval_rst
Please see :doc:`../../northbridge/intel/haswell/mrc.bin`.
```
Now, place mrc.bin in the root of the coreboot directory.
Alternatively, place it anywhere you want, and set `MRC_FILE` to its
location when building coreboot.
## Building coreboot
A fully working image should be possible just by setting your MAC

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@ -0,0 +1,8 @@
# Intel Haswell documentation
This section describes the Intel Haswell architecture as it relates to
coreboot.
## Proprietary blobs
- [mrc.bin](mrc.bin.md)

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# mrc.bin
All Haswell boards supported by coreboot currently require a proprietary
blob in order to initialise the DRAM and a few other components. The
blob, named `mrc.bin`, largely consists of Intel's memory reference code
(MRC), but it has been tailored specifically for Chrome OS. It is just
under 200 KiB in size. Another name for `mrc.bin` is the system agent
binary.
Having a replacement for `mrc.bin` using native coreboot code is very
much desired, but it is not an easy task.
## Obtaining mrc.bin
Unfortunately, it is not currently possible to distribute `mrc.bin` as
part of coreboot. Though, it can be obtained from a Haswell Chromebook
or Chromebox firmware image, and you might find one online. `mrc.bin`
can be extracted with the following command. If extracting from a
"standard" coreboot image, omit `-r RO_SECTION`.
```bash
cbfstool coreboot.rom extract -f mrc.bin -n mrc.bin -r RO_SECTION
```
Now, place `mrc.bin` in the root of the coreboot directory.
Alternatively, place `mrc.bin` anywhere you want, and set `MRC_FILE` to
its location when building coreboot.
## ECC DRAM
When `mrc.bin` has finished executing, ECC is active on the channels
populated with ECC DIMMs. However, `mrc.bin` was tailored specifically
for Haswell Chromebooks and Chomeboxes, none of which support ECC DRAM.
While ECC likely functions correctly, it is advised to further validate
the correct operation of ECC if data integrity is absolutely critical.

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@ -4,4 +4,5 @@ This section contains documentation about coreboot on specific Intel Northbridge
## Platforms
- [Haswell](haswell/index.md)
- [Sandy Bridge](sandybridge/index.md)