soc/intel/xeon_sp/cpx: Rename FSP UPDs using CPP

coreboot expects different names for FSP UPDs so use some CPP to make
it happy.

Change-Id: I4b2c2dd6ba40cb58bc2089eb9204fd4f70b037aa
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57487
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Arthur Heymans 2021-09-08 07:45:23 +02:00 committed by Patrick Georgi
parent bf46ba5adb
commit cbc609957f
3 changed files with 13 additions and 8 deletions

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@ -17,6 +17,8 @@ ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/cpx/include -I$(src)/soc/intel/xeon_sp/cpx CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/cpx/include -I$(src)/soc/intel/xeon_sp/cpx
CPPFLAGS_common += -include $(src)/soc/intel/xeon_sp/cpx/include/soc/fsp_upd.h
cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-55-0b cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-55-0b
endif ## CONFIG_SOC_INTEL_COOPERLAKE_SP endif ## CONFIG_SOC_INTEL_COOPERLAKE_SP

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@ -0,0 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef _FSP_UPD_H_
#define _FSP_UPD_H_
/* Rename the FSP UPD structs to what they were historically called on other platforms. */
#define FSP_T_CONFIG FSPT_CONFIG
#define FSP_M_CONFIG FSPM_CONFIG
#define FSP_S_CONFIG FSPS_CONFIG
#endif

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@ -35,14 +35,6 @@ are permitted provided that the following conditions are met:
#include <FspUpd.h> #include <FspUpd.h>
/*
* Intel CPX-SP FSP has been using FSPM_CONFIG intead of FSP_M_CONFIG.
* Other Intel FSPs have been using FSP_M_CONFIG. The feedback from Intel
* is that they will converge to use FSPM_CONFIG over time. So both will
* co-exist for some time. Today coreboot common code expects FSP_M_CONFIG.
*/
#define FSP_M_CONFIG FSPM_CONFIG
#define SPEED_REC_96GT 0 #define SPEED_REC_96GT 0
#define SPEED_REC_104GT 1 #define SPEED_REC_104GT 1
#define ADAPTIVE_CTLE 0x3f #define ADAPTIVE_CTLE 0x3f