Add missing Intel Pentium II/III era CPU IDs.
Add links to the respective Intel specification updates or manuals where the IDs are listed. Mention the possible core steppings of each CPU ID. There are duplicate IDs in model_6xx and model_68x for now, not sure if those should be eliminated, but there were already duplicates before this patch, so that's probably an extra issue to look into. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5909 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -100,8 +100,26 @@ static struct device_operations cpu_dev_ops = {
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.init = model_68x_init,
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};
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/*
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* Intel Celeron Processor Identification Information
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* http://www.intel.com/design/celeron/qit/update.pdf
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*
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* Intel Pentium III Processor Identification and Package Information
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* http://www.intel.com/design/pentiumiii/qit/update.pdf
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*
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* Intel Pentium III Processor Specification Update
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* http://download.intel.com/design/intarch/specupdt/24445358.pdf
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*
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* Mobile Intel Pentium III/III-M Processor Specification Update
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* http://download.intel.com/design/intarch/specupdt/24530663.pdf
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*/
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static struct cpu_device_id cpu_table[] = {
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{ X86_VENDOR_INTEL, 0x0680 },
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{ X86_VENDOR_INTEL, 0x0681 }, /* PIII, cA2/cA2c/A2/BA2/PA2/MA2 */
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{ X86_VENDOR_INTEL, 0x0683 }, /* PIII/Celeron, cB0/cB0c/B0/BB0/PB0/MB0*/
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{ X86_VENDOR_INTEL, 0x0686 }, /* PIII/Celeron, cC0/C0/BC0/PC0/MC0 */
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{ X86_VENDOR_INTEL, 0x068a }, /* PIII/Celeron, cD0/D0/BD0/PD0 */
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{ 0, 0 },
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};
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@ -86,9 +86,16 @@ static struct device_operations cpu_dev_ops = {
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.init = model_6bx_init,
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};
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/*
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* Pentium III Processor Identification and Package Information.
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* http://www.intel.com/design/pentiumiii/qit/update.pdf
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*
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* Intel Pentium III Processor Specification Update
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* http://download.intel.com/design/intarch/specupdt/24445358.pdf
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*/
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static struct cpu_device_id cpu_table[] = {
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{ X86_VENDOR_INTEL, 0x06B1 },
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{ X86_VENDOR_INTEL, 0x06B4 }, /* Low Voltage PIII Micro-FCBGA Socket 479 */
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{ X86_VENDOR_INTEL, 0x06b1 }, /* Pentium III/Celeron, tA1/A1/FPA1 */
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{ X86_VENDOR_INTEL, 0x06b4 }, /* Pentium III, tB1/FPB1 */
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{ 0, 0 },
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};
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@ -51,20 +51,63 @@ static void model_6xx_init(device_t dev)
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static struct device_operations cpu_dev_ops = {
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.init = model_6xx_init,
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};
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/*
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* Intel Pentium Pro Processor Specification Update
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* http://download.intel.com/design/archives/processors/pro/docs/24268935.pdf
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*
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* Intel Pentium II Processor Specification Update
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* http://download.intel.com/design/PentiumII/specupdt/24333749.pdf
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*
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* Mobile Intel Pentium II Processor Specification Update
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* http://download.intel.com/design/intarch/specupdt/24388757.pdf
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*
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* Intel Celeron Processor Identification Information
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* http://www.intel.com/design/celeron/qit/update.pdf
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*
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* Intel Pentium II Xeon Processor Specification Update
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* http://download.intel.com/support/processors/pentiumii/xeon/24377632.pdf
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*
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* Intel Pentium III Processor Identification and Package Information
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* http://www.intel.com/design/pentiumiii/qit/update.pdf
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*
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* Intel Pentium III Processor Specification Update
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* http://download.intel.com/design/intarch/specupdt/24445358.pdf
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*
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* Mobile Intel Pentium III/III-M Processor Specification Update
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* http://download.intel.com/design/intarch/specupdt/24530663.pdf
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*/
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static struct cpu_device_id cpu_table[] = {
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{ X86_VENDOR_INTEL, 0x0650 },
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{ X86_VENDOR_INTEL, 0x0652 },
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{ X86_VENDOR_INTEL, 0x0660 }, /* Celeron (Mendocino) */
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{ X86_VENDOR_INTEL, 0x0665 },
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{ X86_VENDOR_INTEL, 0x0672 },
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{ X86_VENDOR_INTEL, 0x0673 },
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{ X86_VENDOR_INTEL, 0x0611 }, /* Pentium Pro, B0 */
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{ X86_VENDOR_INTEL, 0x0612 }, /* Pentium Pro, C0 */
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{ X86_VENDOR_INTEL, 0x0616 }, /* Pentium Pro, sA0 */
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{ X86_VENDOR_INTEL, 0x0617 }, /* Pentium Pro, sA1 */
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{ X86_VENDOR_INTEL, 0x0619 }, /* Pentium Pro, sB1 */
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{ X86_VENDOR_INTEL, 0x0633 }, /* PII, C0 */
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{ X86_VENDOR_INTEL, 0x0634 }, /* PII, C1 */
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{ X86_VENDOR_INTEL, 0x0650 }, /* PII/Celeron, dA0/mdA0/A0 */
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{ X86_VENDOR_INTEL, 0x0651 }, /* PII/Celeron, dA1/A1 */
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{ X86_VENDOR_INTEL, 0x0652 }, /* PII/Celeron/Xeon, dB0/mdB0/B0 */
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{ X86_VENDOR_INTEL, 0x0653 }, /* PII/Xeon, dB1/B1 */
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{ X86_VENDOR_INTEL, 0x0660 }, /* Celeron, A0 */
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{ X86_VENDOR_INTEL, 0x0665 }, /* Celeron, B0 */
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{ X86_VENDOR_INTEL, 0x066a }, /* PII, mdxA0/dmmA0 + others */
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{ X86_VENDOR_INTEL, 0x0672 }, /* PIII, kB0 */
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{ X86_VENDOR_INTEL, 0x0673 }, /* PIII, kC0 */
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{ X86_VENDOR_INTEL, 0x0680 },
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{ X86_VENDOR_INTEL, 0x0681 },
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{ X86_VENDOR_INTEL, 0x0683 },
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{ X86_VENDOR_INTEL, 0x0686 },
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{ X86_VENDOR_INTEL, 0x06A0 },
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{ X86_VENDOR_INTEL, 0x06A1 },
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{ X86_VENDOR_INTEL, 0x06A4 },
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{ X86_VENDOR_INTEL, 0x0681 }, /* PIII, cA2/cA2c/A2/BA2/PA2/MA2 */
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{ X86_VENDOR_INTEL, 0x0683 }, /* PIII/Celeron, cB0/cB0c/B0/BB0/PB0/MB0*/
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{ X86_VENDOR_INTEL, 0x0686 }, /* PIII/Celeron, cC0/C0/BC0/PC0/MC0 */
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{ X86_VENDOR_INTEL, 0x068a }, /* PIII/Celeron, cD0/D0/BD0/PD0 */
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{ X86_VENDOR_INTEL, 0x06a0 }, /* PIII, A0 */
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{ X86_VENDOR_INTEL, 0x06a1 }, /* PIII, A1 */
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{ X86_VENDOR_INTEL, 0x06a4 }, /* PIII, B0 */
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{ 0, 0 },
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};
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