mainboard/google/reef: Configure DDI0, DDI1 HPD GPIO lines
Configure GPIO_199 and GPIO_200 as NF2 to work as HPD. Change-Id: If3aa6b75ed22c221cfbedaecf16035cdd9939387 Signed-off-by: Abhay Kumar <abhay.kumar@intel.com> Reviewed-on: https://review.coreboot.org/15447 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -178,8 +178,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NF(GPIO_198, NATIVE, DEEP, NF1), /* PNL1_BKLTCTL */
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/* Hot plug detect. */
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PAD_CFG_NF(GPIO_199, UP_20K, DEEP, NF1), /* HV_DDI1_HPD */
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PAD_CFG_NF(GPIO_200, UP_20K, DEEP, NF1), /* HV_DDI0_HPD */
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PAD_CFG_NF(GPIO_199, UP_20K, DEEP, NF2), /* HV_DDI1_HPD */
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PAD_CFG_NF(GPIO_200, UP_20K, DEEP, NF2), /* HV_DDI0_HPD */
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/* MDSI signals -- unused */
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PAD_CFG_GPI(GPIO_201, UP_20K, DEEP), /* MDSI_A_TE */
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