diff --git a/src/superio/ite/common/env_ctrl.c b/src/superio/ite/common/env_ctrl.c
index c8274db6c8..932f827223 100644
--- a/src/superio/ite/common/env_ctrl.c
+++ b/src/superio/ite/common/env_ctrl.c
@@ -129,6 +129,12 @@ static void enable_tmpin(const u16 base, const u8 tmpin,
 		ite_ec_write(base, ITE_EC_TEMP_ADJUST[tmpin-1], conf->offset);
 	}
 
+	/* Set temperature limits */
+	u8 max = conf->max;
+	ite_ec_write(base, ITE_EC_HIGH_TEMP_LIMIT(tmpin),
+		     max ? max : 127);
+	ite_ec_write(base, ITE_EC_LOW_TEMP_LIMIT(tmpin), conf->min);
+
 	/* Enable the startup of monitoring operation */
 	reg = ite_ec_read(base, ITE_EC_CONFIGURATION);
 	reg |= ITE_EC_CONFIGURATION_START;
diff --git a/src/superio/ite/common/env_ctrl.h b/src/superio/ite/common/env_ctrl.h
index 1be6436310..64603c66a7 100644
--- a/src/superio/ite/common/env_ctrl.h
+++ b/src/superio/ite/common/env_ctrl.h
@@ -86,6 +86,9 @@
 #define   ITE_EC_FAN_CTL_TEMPIN_MASK		(3 << 0)
 #define   ITE_EC_FAN_CTL_TEMPIN(x)		(((x)-1) & 3)
 
+#define ITE_EC_HIGH_TEMP_LIMIT(x)		(0x40 + ((x-1) * 2))
+#define ITE_EC_LOW_TEMP_LIMIT(x)		(0x41 + ((x-1) * 2))
+
 #define ITE_EC_ADC_VOLTAGE_CHANNEL_ENABLE	0x50
 #define ITE_EC_ADC_TEMP_CHANNEL_ENABLE		0x51
 #define   ITE_EC_ADC_TEMP_EXT_REPORTS_TO(x)	(((x) & 3) << 6)
diff --git a/src/superio/ite/common/env_ctrl_chip.h b/src/superio/ite/common/env_ctrl_chip.h
index 8eb908e77a..a535af6dfa 100644
--- a/src/superio/ite/common/env_ctrl_chip.h
+++ b/src/superio/ite/common/env_ctrl_chip.h
@@ -32,6 +32,9 @@ struct ite_ec_thermal_config {
 	enum ite_ec_thermal_mode mode;
 	/* Offset is used for diode sensors and PECI */
 	u8 offset;
+	/* Limits */
+	u8 min;
+	u8 max;
 };
 
 /* Bit mask for voltage pins VINx */