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mainboard/google/snappy: Update DPTF settings 

1. Remove CPU throttling effect of the charger sensor
   Refers Change-Id I267b6e07fa9def2c91ff9f6035f2d9437faf1965
   (mb/google/reef: Remove CPU throttling effect of the charger sensor)
   to remove CPU throttling effect of the charger sensor
   since it's not relevant to throttle CPU based on the charger sensor.
2. Change TSR1 influence from 200 to 100
3. Change TSR2 sample period from 120s to 30s

BUG=b:35585781
BRANCH=reef
TEST=built, and verified on snappy by thermal team.

Change-Id: Ic3fc51c4288b24f4e64950e5b148aed4495a1c3b
Signed-off-by: Wisley Chen <wisley.chen@quantatw.com>
Reviewed-on: https://review.coreboot.org/18950
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
This commit is contained in:
Wisley Chen 2017-03-22 23:01:46 -04:00 committed by Aaron Durbin
parent 021ec2819b
commit ccc21ca685
1 changed files with 3 additions and 5 deletions
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8
src/mainboard/google/reef/variants/snappy/include/variant/acpi/dptf.asl
View File

@ -56,15 +56,13 @@ Name (DTRT, Package () {
Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 },
#ifdef DPTF_ENABLE_CHARGER
/* Charger Effect on Temp Sensor 1 */
Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 100, 1200, 0, 0, 0, 0 },
/* Charger Effect on Temp Sensor 2 */
Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 100, 300, 0, 0, 0, 0 },
#endif
/* CPU Effect on Temp Sensor 1 */
Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 200, 80, 0, 0, 0, 0 },
Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 80, 0, 0, 0, 0 },
/* CPU Effect on Temp Sensor 2 */
Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 100, 150, 0, 0, 0, 0 },
})
Name (MPPC, Package ()