peppy: Port updates from slippy/falco boards

- Add HDA verb table
- Add on-board device table
- Add panel power sequencing values

Change-Id: I1b3450c2740ec1d930f157a9b23550e1efc8668f
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58197
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/4233
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Duncan Laurie 2013-06-11 08:49:55 -07:00 committed by Alexandru Gagniuc
parent 9c660993cd
commit ccd2f28fc4
5 changed files with 216 additions and 62 deletions

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@ -19,6 +19,8 @@
* MA 02110-1301 USA * MA 02110-1301 USA
*/ */
#include <mainboard/google/peppy/onboard.h>
Scope (\_SB) Scope (\_SB)
{ {
Device (LID0) Device (LID0)
@ -35,4 +37,74 @@ Scope (\_SB)
{ {
Name(_HID, EisaId("PNP0C0C")) Name(_HID, EisaId("PNP0C0C"))
} }
Device (TPAD)
{
Name (_ADR, 0x0)
Name (_UID, 1)
// Report as a Sleep Button device so Linux will
// automatically enable it as a wake source
Name (_HID, EisaId("PNP0C0E"))
Name (_CRS, ResourceTemplate()
{
Interrupt (ResourceConsumer, Level, ActiveLow)
{
BOARD_TRACKPAD_IRQ
}
VendorShort (ADDR)
{
BOARD_TRACKPAD_I2C_ADDR
}
})
Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 })
Method (_DSW, 3, NotSerialized)
{
Store (BOARD_TRACKPAD_WAKE_GPIO, Local0)
If (LEqual (Arg0, 1)) {
// Enable GPIO as wake source
\_SB.PCI0.LPCB.GWAK (Local0)
}
}
}
Device (TSCR)
{
Name (_ADR, 0x0)
Name (_UID, 2)
// Report as a Sleep Button device so Linux will
// automatically enable it as a wake source
Name (_HID, EisaId("PNP0C0E"))
Name (_CRS, ResourceTemplate()
{
Interrupt (ResourceConsumer, Level, ActiveLow)
{
BOARD_TOUCHSCREEN_IRQ
}
VendorShort (ADDR)
{
BOARD_TOUCHSCREEN_I2C_ADDR
}
})
Name (_PRW, Package() { BOARD_TOUCHSCREEN_WAKE_GPIO, 0x3 })
Method (_DSW, 3, NotSerialized)
{
Store (BOARD_TOUCHSCREEN_WAKE_GPIO, Local0)
If (LEqual (Arg0, 1)) {
// Enable GPIO as wake source
\_SB.PCI0.LPCB.GWAK (Local0)
}
}
}
} }

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@ -13,6 +13,14 @@ chip northbridge/intel/haswell
register "gpu_cpu_backlight" = "0x00000200" register "gpu_cpu_backlight" = "0x00000200"
register "gpu_pch_backlight" = "0x04000000" register "gpu_pch_backlight" = "0x04000000"
# Enable Panel and configure power delays
register "gpu_panel_port_select" = "1" # eDP
register "gpu_panel_power_cycle_delay" = "5" # 400ms
register "gpu_panel_power_up_delay" = "400" # 40ms
register "gpu_panel_power_down_delay" = "150" # 15ms
register "gpu_panel_power_backlight_on_delay" = "2100" # 210ms
register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_rPGA989 chip cpu/intel/socket_rPGA989
device lapic 0 on end device lapic 0 on end

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@ -1,7 +1,7 @@
/* /*
* This file is part of the coreboot project. * This file is part of the coreboot project.
* *
* Copyright (C) 2012 Google Inc. * Copyright (C) 2013 Google Inc.
* *
* This program is free software; you can redistribute it and/or * This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as * modify it under the terms of the GNU General Public License as
@ -19,81 +19,77 @@
static const u32 mainboard_cim_verb_data[] = { static const u32 mainboard_cim_verb_data[] = {
/* coreboot specific header */ /* coreboot specific header */
0x10134210, // Codec Vendor / Device ID: Cirrus Logic CS4210 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
0x10134210, // Subsystem ID 0x10ec0283, // Subsystem ID
0x00000007, // Number of jacks 0x0000000b, // Number of jacks (NID entries)
/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10134210 */ /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */
0x00172010, 0x00172083,
0x00172142, 0x00172102,
0x00172213, 0x001722ec,
0x00172310, 0x00172310,
/* Pin Widget Verb Table */ /* Pin Widget Verb Table */
/* Pin Complex (NID 0x05) 1/8 Gray HP Out at Ext Front */ /* Pin Complex (NID 0x12) DMIC - interior mobile lid */
0x00571cf0, 0x00571c10,
0x00571d20, 0x00571d10,
0x00571e21, 0x00571ea6,
0x00571f02, 0x00571fb7,
/* Pin Complex (NID 0x06) Analog Unknown Speaker at Int N/A */ /* Pin Complex (NID 0x14) SPKR-OUT PORTD */
0x00671c10, 0x01471c10, // group 1, front left/right
0x00671d00, 0x01471d01, // no connector, no jack detect
0x00671e17, 0x01471e17, // speaker out, analog
0x00671f90, 0x01471f90, // fixed function, internal
/* Pin Complex (NID 0x07) 1/8 Grey Line In at Ext Front */ /* Pin Complex (NID 0x17) */
0x00771cf0, 0x01771cf0,
0x00771d20, 0x01771d11,
0x00771ea1, 0x01771e11,
0x00771f02, 0x01771f41,
/* Pin Complex (NID 0x08) Analog Unknown Mic at Oth Mobile-In */ /* Pin Complex (NID 0x18) MIC1 PORTB */
0x00871c37, 0x01971c11, // group 1, cap 1
0x00871d00, 0x01971d10, // black, jack detect
0x00871ea7, 0x01971ea7, // mic in, analog
0x00871f77, 0x01971f03, // connector, left panel
/* Pin Complex (NID 0x09) Digital Unknown Mic at Oth Mobile-In */ /* Pin Complex (NID 0x19) MIC2 PORTF */
0x00971c3e, 0x01871cf0,
0x00971d00, 0x01871d11,
0x00971ea6, 0x01871e11,
0x00971f77, 0x01871f41,
/* Pin Complex (NID 0x0a) Optical Black SPDIF Out at Ext N/A */ /* Pin Complex (NID 0x1A) LINE1 PORTC */
0x00a71cf0, 0x01a71cf0,
0x00a71d10, 0x01a71d11,
0x00a71e45, 0x01a71e11,
0x00a71f43, 0x01a71f41,
/* coreboot specific header */ /* Pin Complex (NID 0x1B) LINE2 PORTE */
0x80862805, // Codec Vendor / Device ID: Intel CougarPoint HDMI 0x01a71cf0,
0x80860101, // Subsystem ID 0x01a71d11,
0x00000004, // Number of jacks 0x01a71e11,
0x01a71f41,
/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */ /* Pin Complex (NID 0x1d) PCBeep */
0x00172001, 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable
0x00172101, 0x01d71d81, // mute spkr on hpout
0x00172286, 0x01d71e15, // pcbeep en able, checksum
0x00172380, 0x01d71f40, // no physical, internal
/* Pin Complex (NID 0x05) Digital Out at Int HDMI */ /* Pin Complex (NID 0x1E) SPDIF-OUT */
0x30571c10, 0x01e71cf0,
0x30571d00, 0x01e71d11,
0x30571e56, 0x01e71e11,
0x30571f18, 0x01e71f41,
/* Pin Complex (NID 0x06) Digital Out at Int HDMI */ /* Pin Complex (NID 0x21) HPOUT PORT-I */
0x30671c20, 0x02171c1f, // group1,
0x30671d00, 0x02171d10, // black, jack detect
0x30671e56, 0x02171e21, // HPOut, 1/8 stereo
0x30671f18, 0x02171f03, // connector, left panel
/* Pin Complex (NID 0x07) Digital Out at Int HDMI */
0x30771c30,
0x30771d00,
0x30771e56,
0x30771f18
}; };

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@ -20,6 +20,7 @@
#include <types.h> #include <types.h>
#include <string.h> #include <string.h>
#include <smbios.h>
#include <device/device.h> #include <device/device.h>
#include <device/device.h> #include <device/device.h>
#include <device/pci_def.h> #include <device/pci_def.h>
@ -36,6 +37,7 @@
#include "hda_verb.h" #include "hda_verb.h"
#include <southbridge/intel/lynxpoint/pch.h> #include <southbridge/intel/lynxpoint/pch.h>
#include "ec.h" #include "ec.h"
#include "onboard.h"
void mainboard_suspend_resume(void) void mainboard_suspend_resume(void)
{ {
@ -145,12 +147,48 @@ static void mainboard_init(device_t dev)
mainboard_ec_init(); mainboard_ec_init();
} }
static int mainboard_smbios_data(device_t dev, int *handle,
unsigned long *current)
{
int len = 0;
len += smbios_write_type41(
current, handle,
BOARD_LIGHTSENSOR_NAME, /* name */
BOARD_LIGHTSENSOR_IRQ, /* instance */
BOARD_LIGHTSENSOR_I2C_BUS, /* segment */
BOARD_LIGHTSENSOR_I2C_ADDR, /* bus */
0, /* device */
0); /* function */
len += smbios_write_type41(
current, handle,
BOARD_TRACKPAD_NAME, /* name */
BOARD_TRACKPAD_IRQ, /* instance */
BOARD_TRACKPAD_I2C_BUS, /* segment */
BOARD_TRACKPAD_I2C_ADDR, /* bus */
0, /* device */
0); /* function */
len += smbios_write_type41(
current, handle,
BOARD_TOUCHSCREEN_NAME, /* name */
BOARD_TOUCHSCREEN_IRQ, /* instance */
BOARD_TOUCHSCREEN_I2C_BUS, /* segment */
BOARD_TOUCHSCREEN_I2C_ADDR, /* bus */
0, /* device */
0); /* function */
return len;
}
// mainboard_enable is executed as first thing after // mainboard_enable is executed as first thing after
// enumerate_buses(). // enumerate_buses().
static void mainboard_enable(device_t dev) static void mainboard_enable(device_t dev)
{ {
dev->ops->init = mainboard_init; dev->ops->init = mainboard_init;
dev->ops->get_smbios_data = mainboard_smbios_data;
#if CONFIG_PCI_ROM_RUN || CONFIG_VGA_ROM_RUN #if CONFIG_PCI_ROM_RUN || CONFIG_VGA_ROM_RUN
/* Install custom int15 handler for VGA OPROM */ /* Install custom int15 handler for VGA OPROM */
mainboard_interrupt_handlers(0x15, &int15_handler); mainboard_interrupt_handlers(0x15, &int15_handler);

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@ -0,0 +1,40 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef ONBOARD_H
#define ONBOARD_H
#define BOARD_LIGHTSENSOR_NAME "lightsensor"
#define BOARD_LIGHTSENSOR_IRQ 51 /* PIRQT */
#define BOARD_LIGHTSENSOR_I2C_BUS 2 /* I2C1 */
#define BOARD_LIGHTSENSOR_I2C_ADDR 0x44
#define BOARD_TRACKPAD_NAME "trackpad"
#define BOARD_TRACKPAD_IRQ 37 /* PIRQV */
#define BOARD_TRACKPAD_WAKE_GPIO 12 /* GPIO12 */
#define BOARD_TRACKPAD_I2C_BUS 1 /* I2C0 */
#define BOARD_TRACKPAD_I2C_ADDR 0x67
#define BOARD_TOUCHSCREEN_NAME "touchscreen"
#define BOARD_TOUCHSCREEN_IRQ 38 /* PIRQW */
#define BOARD_TOUCHSCREEN_WAKE_GPIO 25 /* GPIO25 */
#define BOARD_TOUCHSCREEN_I2C_BUS 2 /* I2C1 */
#define BOARD_TOUCHSCREEN_I2C_ADDR 0x4a
#endif