peppy: Port updates from slippy/falco boards
- Add HDA verb table - Add on-board device table - Add panel power sequencing values Change-Id: I1b3450c2740ec1d930f157a9b23550e1efc8668f Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/58197 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: http://review.coreboot.org/4233 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Duncan Laurie
Alexandru Gagniuc
parent
9c660993cd
commit
ccd2f28fc4
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@ -19,6 +19,8 @@
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* MA 02110-1301 USA
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*/
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#include <mainboard/google/peppy/onboard.h>
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Scope (\_SB)
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{
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Device (LID0)
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@ -35,4 +37,74 @@ Scope (\_SB)
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{
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Name(_HID, EisaId("PNP0C0C"))
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}
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Device (TPAD)
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{
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Name (_ADR, 0x0)
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Name (_UID, 1)
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// Report as a Sleep Button device so Linux will
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// automatically enable it as a wake source
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Name (_HID, EisaId("PNP0C0E"))
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Name (_CRS, ResourceTemplate()
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{
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Interrupt (ResourceConsumer, Level, ActiveLow)
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{
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BOARD_TRACKPAD_IRQ
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}
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VendorShort (ADDR)
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{
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BOARD_TRACKPAD_I2C_ADDR
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}
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})
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Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 })
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Method (_DSW, 3, NotSerialized)
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{
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Store (BOARD_TRACKPAD_WAKE_GPIO, Local0)
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If (LEqual (Arg0, 1)) {
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// Enable GPIO as wake source
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\_SB.PCI0.LPCB.GWAK (Local0)
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}
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}
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}
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Device (TSCR)
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{
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Name (_ADR, 0x0)
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Name (_UID, 2)
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// Report as a Sleep Button device so Linux will
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// automatically enable it as a wake source
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Name (_HID, EisaId("PNP0C0E"))
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Name (_CRS, ResourceTemplate()
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{
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Interrupt (ResourceConsumer, Level, ActiveLow)
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{
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BOARD_TOUCHSCREEN_IRQ
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}
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VendorShort (ADDR)
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{
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BOARD_TOUCHSCREEN_I2C_ADDR
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}
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})
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Name (_PRW, Package() { BOARD_TOUCHSCREEN_WAKE_GPIO, 0x3 })
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Method (_DSW, 3, NotSerialized)
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{
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Store (BOARD_TOUCHSCREEN_WAKE_GPIO, Local0)
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If (LEqual (Arg0, 1)) {
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// Enable GPIO as wake source
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\_SB.PCI0.LPCB.GWAK (Local0)
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}
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}
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}
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}
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@ -13,6 +13,14 @@ chip northbridge/intel/haswell
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register "gpu_cpu_backlight" = "0x00000200"
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register "gpu_pch_backlight" = "0x04000000"
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# Enable Panel and configure power delays
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register "gpu_panel_port_select" = "1" # eDP
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register "gpu_panel_power_cycle_delay" = "5" # 400ms
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register "gpu_panel_power_up_delay" = "400" # 40ms
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register "gpu_panel_power_down_delay" = "150" # 15ms
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register "gpu_panel_power_backlight_on_delay" = "2100" # 210ms
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register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms
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device cpu_cluster 0 on
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chip cpu/intel/socket_rPGA989
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device lapic 0 on end
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@ -1,7 +1,7 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Google Inc.
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* Copyright (C) 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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@ -19,81 +19,77 @@
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static const u32 mainboard_cim_verb_data[] = {
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/* coreboot specific header */
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0x10134210, // Codec Vendor / Device ID: Cirrus Logic CS4210
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0x10134210, // Subsystem ID
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0x00000007, // Number of jacks
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0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283
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0x10ec0283, // Subsystem ID
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0x0000000b, // Number of jacks (NID entries)
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/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10134210 */
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0x00172010,
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0x00172142,
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0x00172213,
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/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */
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0x00172083,
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0x00172102,
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0x001722ec,
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0x00172310,
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/* Pin Widget Verb Table */
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/* Pin Complex (NID 0x05) 1/8 Gray HP Out at Ext Front */
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0x00571cf0,
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0x00571d20,
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0x00571e21,
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0x00571f02,
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/* Pin Complex (NID 0x12) DMIC - interior mobile lid */
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0x00571c10,
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0x00571d10,
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0x00571ea6,
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0x00571fb7,
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/* Pin Complex (NID 0x06) Analog Unknown Speaker at Int N/A */
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0x00671c10,
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0x00671d00,
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0x00671e17,
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0x00671f90,
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/* Pin Complex (NID 0x14) SPKR-OUT PORTD */
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0x01471c10, // group 1, front left/right
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0x01471d01, // no connector, no jack detect
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0x01471e17, // speaker out, analog
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0x01471f90, // fixed function, internal
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/* Pin Complex (NID 0x07) 1/8 Grey Line In at Ext Front */
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0x00771cf0,
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0x00771d20,
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0x00771ea1,
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0x00771f02,
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/* Pin Complex (NID 0x17) */
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0x01771cf0,
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0x01771d11,
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0x01771e11,
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0x01771f41,
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/* Pin Complex (NID 0x08) Analog Unknown Mic at Oth Mobile-In */
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0x00871c37,
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0x00871d00,
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0x00871ea7,
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0x00871f77,
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/* Pin Complex (NID 0x18) MIC1 PORTB */
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0x01971c11, // group 1, cap 1
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0x01971d10, // black, jack detect
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0x01971ea7, // mic in, analog
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0x01971f03, // connector, left panel
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/* Pin Complex (NID 0x09) Digital Unknown Mic at Oth Mobile-In */
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0x00971c3e,
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0x00971d00,
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0x00971ea6,
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0x00971f77,
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/* Pin Complex (NID 0x19) MIC2 PORTF */
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0x01871cf0,
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0x01871d11,
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0x01871e11,
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0x01871f41,
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/* Pin Complex (NID 0x0a) Optical Black SPDIF Out at Ext N/A */
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0x00a71cf0,
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0x00a71d10,
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0x00a71e45,
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0x00a71f43,
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/* Pin Complex (NID 0x1A) LINE1 PORTC */
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0x01a71cf0,
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0x01a71d11,
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0x01a71e11,
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0x01a71f41,
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/* coreboot specific header */
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0x80862805, // Codec Vendor / Device ID: Intel CougarPoint HDMI
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0x80860101, // Subsystem ID
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0x00000004, // Number of jacks
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/* Pin Complex (NID 0x1B) LINE2 PORTE */
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0x01a71cf0,
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0x01a71d11,
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0x01a71e11,
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0x01a71f41,
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/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
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0x00172001,
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0x00172101,
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0x00172286,
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0x00172380,
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/* Pin Complex (NID 0x1d) PCBeep */
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0x01d71c2d, // eapd low on ex-amp, laptop, custom enable
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0x01d71d81, // mute spkr on hpout
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0x01d71e15, // pcbeep en able, checksum
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0x01d71f40, // no physical, internal
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/* Pin Complex (NID 0x05) Digital Out at Int HDMI */
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0x30571c10,
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0x30571d00,
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0x30571e56,
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0x30571f18,
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/* Pin Complex (NID 0x1E) SPDIF-OUT */
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0x01e71cf0,
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0x01e71d11,
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0x01e71e11,
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0x01e71f41,
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/* Pin Complex (NID 0x06) Digital Out at Int HDMI */
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0x30671c20,
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0x30671d00,
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0x30671e56,
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0x30671f18,
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/* Pin Complex (NID 0x21) HPOUT PORT-I */
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0x02171c1f, // group1,
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0x02171d10, // black, jack detect
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0x02171e21, // HPOut, 1/8 stereo
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0x02171f03, // connector, left panel
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/* Pin Complex (NID 0x07) Digital Out at Int HDMI */
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0x30771c30,
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0x30771d00,
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0x30771e56,
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0x30771f18
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};
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@ -20,6 +20,7 @@
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#include <types.h>
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#include <string.h>
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#include <smbios.h>
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#include <device/device.h>
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#include <device/device.h>
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#include <device/pci_def.h>
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@ -36,6 +37,7 @@
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#include "hda_verb.h"
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#include <southbridge/intel/lynxpoint/pch.h>
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#include "ec.h"
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#include "onboard.h"
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void mainboard_suspend_resume(void)
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{
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@ -145,12 +147,48 @@ static void mainboard_init(device_t dev)
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mainboard_ec_init();
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}
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static int mainboard_smbios_data(device_t dev, int *handle,
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unsigned long *current)
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{
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int len = 0;
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len += smbios_write_type41(
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current, handle,
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BOARD_LIGHTSENSOR_NAME, /* name */
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BOARD_LIGHTSENSOR_IRQ, /* instance */
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BOARD_LIGHTSENSOR_I2C_BUS, /* segment */
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BOARD_LIGHTSENSOR_I2C_ADDR, /* bus */
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0, /* device */
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0); /* function */
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len += smbios_write_type41(
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current, handle,
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BOARD_TRACKPAD_NAME, /* name */
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BOARD_TRACKPAD_IRQ, /* instance */
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BOARD_TRACKPAD_I2C_BUS, /* segment */
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BOARD_TRACKPAD_I2C_ADDR, /* bus */
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0, /* device */
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0); /* function */
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len += smbios_write_type41(
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current, handle,
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BOARD_TOUCHSCREEN_NAME, /* name */
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BOARD_TOUCHSCREEN_IRQ, /* instance */
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BOARD_TOUCHSCREEN_I2C_BUS, /* segment */
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BOARD_TOUCHSCREEN_I2C_ADDR, /* bus */
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0, /* device */
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0); /* function */
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return len;
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}
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// mainboard_enable is executed as first thing after
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// enumerate_buses().
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = mainboard_init;
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dev->ops->get_smbios_data = mainboard_smbios_data;
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#if CONFIG_PCI_ROM_RUN || CONFIG_VGA_ROM_RUN
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/* Install custom int15 handler for VGA OPROM */
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mainboard_interrupt_handlers(0x15, &int15_handler);
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@ -0,0 +1,40 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef ONBOARD_H
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#define ONBOARD_H
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#define BOARD_LIGHTSENSOR_NAME "lightsensor"
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#define BOARD_LIGHTSENSOR_IRQ 51 /* PIRQT */
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#define BOARD_LIGHTSENSOR_I2C_BUS 2 /* I2C1 */
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#define BOARD_LIGHTSENSOR_I2C_ADDR 0x44
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#define BOARD_TRACKPAD_NAME "trackpad"
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#define BOARD_TRACKPAD_IRQ 37 /* PIRQV */
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#define BOARD_TRACKPAD_WAKE_GPIO 12 /* GPIO12 */
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#define BOARD_TRACKPAD_I2C_BUS 1 /* I2C0 */
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#define BOARD_TRACKPAD_I2C_ADDR 0x67
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#define BOARD_TOUCHSCREEN_NAME "touchscreen"
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#define BOARD_TOUCHSCREEN_IRQ 38 /* PIRQW */
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#define BOARD_TOUCHSCREEN_WAKE_GPIO 25 /* GPIO25 */
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#define BOARD_TOUCHSCREEN_I2C_BUS 2 /* I2C1 */
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#define BOARD_TOUCHSCREEN_I2C_ADDR 0x4a
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#endif
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