updating to working version from my pre-svn repo.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2017 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich
parent
2f25710285
commit
ccf52a92f4
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@ -5,7 +5,7 @@
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default ROM_SIZE = 512 * 1024
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default FALLBACK_SIZE = 0x10000
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = 64 * 1024 # FALLBACK_SIZE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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@ -108,6 +108,11 @@ if USE_FALLBACK_IMAGE
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mainboardinit ./failover.inc
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end
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# VGA console
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if CONFIG_CONSOLE_VGA
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default CONFIG_PCI_ROM_RUN=1
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end
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###
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### O.k. We aren't just an intermediary anymore!
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###
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@ -122,13 +127,19 @@ mainboardinit ./auto.inc
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## Include the secondary Configuration files
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##
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dir /pc80
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dir /devices
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config chip.h
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chip cpu/amd/sc520
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device pci_domain 0 on
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device pci 0.0 on end
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device pci 1.0 on end
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chip drivers/pci/onboard
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device pci 14.0 on end # 69000
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register "rom_address" = "0x2000000"
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end
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# register "com1" = "{1}"
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# register "com1" = "{1, 0, 0x3f8, 4}"
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end
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end
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@ -7,6 +7,7 @@ uses HAVE_OPTION_TABLE
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uses USE_OPTION_TABLE
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uses CONFIG_COMPRESS
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uses CONFIG_ROM_STREAM
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uses CONFIG_USE_INIT
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uses IRQ_SLOT_COUNT
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uses MAINBOARD
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uses MAINBOARD_VENDOR
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@ -39,6 +40,13 @@ uses CONFIG_CONSOLE_SERIAL8250
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uses DEFAULT_CONSOLE_LOGLEVEL
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uses MAXIMUM_CONSOLE_LOGLEVEL
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# VGA support
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uses CONFIG_CONSOLE_VGA
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uses CONFIG_LEGACY_VGABIOS
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uses VGABIOS_START
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uses CONFIG_PCI_ROM_RUN
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default CONFIG_CONSOLE_SERIAL8250=1
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default DEFAULT_CONSOLE_LOGLEVEL=9
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default MAXIMUM_CONSOLE_LOGLEVEL=9
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@ -68,7 +76,7 @@ default HAVE_HARD_RESET=1
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## Build code to export a programmable irq routing table
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##
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default HAVE_PIRQ_TABLE=1
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default IRQ_SLOT_COUNT=5
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default IRQ_SLOT_COUNT=7
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#object irq_tables.o
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##
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@ -65,6 +65,102 @@ static inline void dumpmem(void){
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}
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}
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static inline void irqinit(void){
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volatile unsigned char *cp;
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#if 0
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/* these values taken from the msm board itself.
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* and they cause the board to not even come out of calibrating_delay_loop
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* if you can believe it. Our problem right now is no IDE or serial interrupts
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* So we'll try to put interrupts in, one at a time. IDE first.
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*/
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cp = (volatile unsigned char *) 0xfffefd00;
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*cp = 0x11;
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cp = (volatile unsigned char *) 0xfffefd02;
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*cp = 0x02;
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cp = (volatile unsigned char *) 0xfffefd03;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd04;
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*cp = 0xf7;
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cp = (volatile unsigned char *) 0xfffefd08;
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*cp = 0xf7;
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cp = (volatile unsigned char *) 0xfffefd0a;
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*cp = 0x8b;
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cp = (volatile unsigned char *) 0xfffefd10;
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*cp = 0x18;
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cp = (volatile unsigned char *) 0xfffefd14;
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*cp = 0x09;
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cp = (volatile unsigned char *) 0xfffefd18;
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*cp = 0x88;
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cp = (volatile unsigned char *) 0xfffefd1a;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd1b;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd1c;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd20;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd21;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd22;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd28;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd29;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd30;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd31;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd32;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd33;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd40;
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*cp = 0x10;
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cp = (volatile unsigned char *) 0xfffefd41;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd42;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd43;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd44;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd45;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd46;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd50;
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*cp = 0x37;
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cp = (volatile unsigned char *) 0xfffefd51;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd52;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd53;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd54;
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*cp = 0x37;
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cp = (volatile unsigned char *) 0xfffefd55;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd56;
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*cp = 0x37;
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cp = (volatile unsigned char *) 0xfffefd57;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd58;
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*cp = 0xff;
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cp = (volatile unsigned char *) 0xfffefd59;
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*cp = 0xff;
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cp = (volatile unsigned char *) 0xfffefd5a;
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*cp = 0xff;
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#endif
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#if 0
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/* this fails too */
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/* IDE only ... */
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cp = (volatile unsigned char *) 0xfffefd56;
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*cp = 0xe;
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#endif
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}
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static void main(unsigned long bist)
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{
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volatile int i;
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@ -73,6 +169,7 @@ static void main(unsigned long bist)
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setupsc520();
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irqinit();
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uart_init();
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console_init();
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for(i = 0; i < 100; i++)
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@ -123,11 +220,11 @@ static void main(unsigned long bist)
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// Check 32MB of memory @ 0
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ram_check(0x00000000, 0x02000000);
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#endif
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#if 0
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#if 1
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{
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volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x70000;
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volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x60000;
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volatile unsigned char *dst = (unsigned char *) 0x4000;
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for(i = 0; i < 0x10000; i++) {
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for(i = 0; i < 0x20000; i++) {
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/*
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print_err("Set dst "); print_err_hex32((unsigned long) dst);
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print_err(" to "); print_err_hex32(*src); print_err("\r\n");
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@ -1,36 +1,32 @@
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/* This file was generated by getpir.c, do not modify!
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(but if you do, please run checkpir on it to verify)
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Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
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Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
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* Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
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*
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* Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
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*/
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#include <arch/pirq_routing.h>
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const struct irq_routing_table intel_irq_routing_table = {
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_VERSION, /* u16 version */
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32+16*5, /* there can be total 5 devices on the bus */
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0, /* Where the interrupt router lies (bus) */
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0x88, /* Where the interrupt router lies (dev) */
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0x1c20, /* IRQs devoted exclusively to PCI usage */
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0x1106, /* Vendor */
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0x8231, /* Device */
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0, /* Crap (miniport) */
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_VERSION, /* u16 version */
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32+16*7, /* there can be total 7 devices on the bus */
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0x00, /* Where the interrupt router lies (bus) */
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(0x00<<3)|0x0, /* Where the interrupt router lies (dev) */
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0, /* IRQs devoted exclusively to PCI usage */
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0x8086, /* Vendor */
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0x122e, /* Device */
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0, /* Crap (miniport) */
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
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0x5e, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
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0x50, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
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{
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/* 8231 ethernet */
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{0,0x90, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x1, 0},
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/* 8231 internal */
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{0,0x88, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x2, 0},
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/* PCI slot */
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{0,0xa0, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}}, 0, 0},
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{0,0x50, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x3, 0},
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{0,0x98, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0},
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/* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
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{0x00,(0x09<<3)|0x0, {{0x30, 0x8e80}, {0x31, 0x8e80}, {0x32, 0x8e80}, {0x33, 0x08e80}}, 0x1, 0x0},
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{0x00,(0x0a<<3)|0x0, {{0x31, 0x8e80}, {0x32, 0x8e80}, {0x33, 0x8e80}, {0x30, 0x08e80}}, 0x2, 0x0},
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{0x00,(0x0b<<3)|0x0, {{0x32, 0x8e80}, {0x33, 0x8e80}, {0x30, 0x8e80}, {0x31, 0x08e80}}, 0x3, 0x0},
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{0x00,(0x0c<<3)|0x0, {{0x33, 0x8e80}, {0x30, 0x8e80}, {0x31, 0x8e80}, {0x32, 0x08e80}}, 0x4, 0x0},
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{0x00,(0x0f<<3)|0x0, {{0x32, 0x8e80}, {0x00, 0x8e80}, {0x00, 0x8e80}, {0x00, 0x08e80}}, 0x0, 0x0},
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{0x00,(0x12<<3)|0x0, {{0x30, 0x8e80}, {0x00, 0x8e80}, {0x00, 0x8e80}, {0x00, 0x08e80}}, 0x0, 0x0},
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{0x00,(0x14<<3)|0x0, {{0x30, 0x8e80}, {0x31, 0x8e80}, {0x32, 0x8e80}, {0x33, 0x08e80}}, 0x0, 0x0},
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}
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};
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unsigned long write_pirq_routing_table(unsigned long addr)
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{
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return copy_pirq_routing_table(addr);
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}
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@ -3,9 +3,139 @@
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <cpu/amd/sc520.h>
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#include "chip.h"
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static void irqdump()
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{
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volatile unsigned char *irq;
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void *mmcr;
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int i;
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int irqlist[] = {0xd00, 0xd02, 0xd03, 0xd04, 0xd08, 0xd0a,
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0xd14, 0xd18, 0xd1a, 0xd1b, 0xd1c,
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0xd20, 0xd21, 0xd22, 0xd28, 0xd29,
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0xd30, 0xd31, 0xd32, 0xd33,
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0xd40, 0xd41, 0xd42, 0xd43,0xd44, 0xd45, 0xd46,
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0xd50, 0xd51, 0xd52, 0xd53,0xd54, 0xd55, 0xd56, 0xd57,0xd58, 0xd59, 0xd5a,
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-1};
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mmcr = (void *) 0xfffef000;
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printk_err("mmcr is %p\n", mmcr);
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for(i = 0; irqlist[i] >= 0; i++) {
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irq = mmcr + irqlist[i];
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printk_err("0x%x register @%p is 0x%lx\n", irqlist[i], irq, *irq);
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}
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}
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/* TODO: finish up mmcr struct in sc520.h, and;
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- set ADDDECTL (now done in raminit.c in cpu/amd/sc520
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*/
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static void enable_dev(struct device *dev) {
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volatile struct mmcrpic *pic = MMCRPIC;
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volatile struct mmcr *mmcr = MMCRDEFAULT;
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/* msm586seg has this register set to a weird value.
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* follow the board, not the manual!
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*/
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/* currently, nothing in the device to use, so ignore it. */
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printk_err("digital logic msm586 seg ENTER %s\n", __FUNCTION__);
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/* from fuctory bios */
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/* NOTE: the following interrupt settings made interrupts work
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* for hard drive, and serial, but not for ethernet
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*/
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/* just do what they say and nobody gets hurt. */
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mmcr->pic.pcicr = 0 ; // M_GINT_MODE | M_S1_MODE | M_S2_MODE;
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/* all ints to level */
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mmcr->pic.mpicmode = 0;
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mmcr->pic.sl1picmode = 0;
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mmcr->pic.sl2picmode = 0x80;
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mmcr->pic.intpinpol = 0;
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mmcr->pic.pit0map = 1;
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mmcr->pic.uart1map = 0xc;
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mmcr->pic.uart2map = 0xb;
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mmcr->pic.rtcmap = 3;
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mmcr->pic.ferrmap = 8;
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mmcr->pic.gp0imap = 6;
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mmcr->pic.gp1imap = 2;
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mmcr->pic.gp2imap = 7;
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mmcr->pic.gp6imap = 0x15;
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mmcr->pic.gp7imap = 0x16;
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mmcr->pic.gp10imap = 0x9;
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mmcr->pic.gp9imap = 0x4;
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irqdump();
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printk_err("uart 1 ctl is 0x%x\n", *(unsigned char *) 0xfffefcc0);
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printk_err("0xc20 ctl is 0x%x\n", *(unsigned short *) 0xfffefc20);
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printk_err("0xc22 0x%x\n", *(unsigned short *) 0xfffefc22b);
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/* The following block has NOT proven sufficient to get
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* the VGA hardware to talk to us
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*/
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/* let's set some mmcr stuff per the BIOS settings */
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mmcr->dbctl.dbctl = 0x10;
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mmcr->sysarb.ctl = 6;
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mmcr->sysarb.menb = 0xf;
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mmcr->sysarb.prictl = 0xc0000f0f;
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/* this is bios setting, depends on sysarb above */
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mmcr->hostbridge.ctl = 0x108;
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printk_err("digital logic msm586 seg EXIT %s\n", __FUNCTION__);
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/* pio */
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mmcr->pio.data31_16 = 0xffbf;
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/* pci stuff */
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mmcr->pic.pciintamap = 0xa;
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/* END block where vga hardware still will not talk to us */
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/* all we get from VGA I/O addresses are ffff etc.
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*/
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mmcr->sysmap.adddecctl = 0x10;
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/* VGA now talks to us, so this adddecctl was the trick.
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* still no interrupts from enet.
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* Let's try fixing the piodata stuff, as there may be
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* some wire there not documented.
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*/
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mmcr->pio.data31_16 = 0xffbf;
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/* also, our sl?picmode needs to match fuctory bios */
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mmcr->pic.sl1picmode = 0x80;
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mmcr->pic.sl2picmode = 0x0;
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/* and, finally, they do set gp5imap and we don't.
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*/
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mmcr->pic.gp5imap = 0xd;
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/* remaining problem: almost certainly, the irq table is bogus
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* NO SHOCK as it came from fuctory bios.
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* but let's try these 4 changes for now and see what shakes.
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*/
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/* still not interrupts. */
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/* their IRQ table is wrong. Just hardwire it */
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{
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char pciints[4] = {15, 15, 15, 15};
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pci_assign_irqs(0, 12, pciints);
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}
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/* the assigned failed but we just noticed -- there is no
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* dma mapping, and selftest on e100 requires that dma work
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*/
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/* follow fuctory here */
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mmcr->dmacontrol.extchanmapa = 0x3210;
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}
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struct chip_operations mainboard_digitallogic_msm586seg_ops = {
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CHIP_NAME("Digital Logic MSM586SEG mainboard ")
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.enable_dev = enable_dev
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};
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Loading…
Reference in New Issue